diff --git a/Makefile b/Makefile index c31bc71a342d067b74f673b8be581d6fdb16b81d..e0949c7018ae17ba877ab21bc90e0b3764f6539c 100644 --- a/Makefile +++ b/Makefile @@ -81,7 +81,9 @@ else endif endif ifeq ($(LOSCFG_PLATFORM_ESP32)$(LOSCFG_PLATFORM_ESP32_QEMU), y) - esptool.py --chip esp32 elf2image -o $(OUT)/$@.bin $(OUT)/$@.elf + esptool.py --chip esp32 elf2image --flash_mode dio --flash_freq 80m --flash_size 4MB -o $(OUT)/$@.bin $(OUT)/$@.elf +else ifeq ($(LOSCFG_PLATFORM_ESP8266), y) + esptool.py --chip esp8266 elf2image --flash_mode dio --flash_freq 40m --flash_size 2MB --version=3 -o $(OUT)/$@.bin $(OUT)/$@.elf else $(OBJCOPY) -O binary $(OUT)/$@.elf $(OUT)/$@.bin endif diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index c409934f42e4e01b2e78790da0bb17a0cff7c1c5..f36978f611f27f18d1be30c19c90a2f1afcc8cdd 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -19,6 +19,11 @@ config LOSCFG_ARCH_XTENSA_LX6 select LOSCFG_LIB_LIBC select LOSCFG_ARCH_XTENSA_ARCH32 +config LOSCFG_ARCH_XTENSA_L106 + bool + select LOSCFG_LIB_LIBC + select LOSCFG_ARCH_XTENSA_ARCH32 + config LOSCFG_ARCH_XTENSA_XEA2 bool select LOSCFG_ARCH_XTENSA @@ -31,6 +36,7 @@ config LOSCFG_ARCH_XTENSA_XEA3 config LOSCFG_ARCH_CPU string default "xtensa-lx6" if LOSCFG_ARCH_XTENSA_LX6 + default "xtensa-l106" if LOSCFG_ARCH_XTENSA_L106 default "xtensa-xea2" if LOSCFG_ARCH_XTENSA_XEA2 default "xtensa-xea3" if LOSCFG_ARCH_XTENSA_XEA3 diff --git a/arch/xtensa/cpu.mk b/arch/xtensa/cpu.mk index 9838fcb7b1e38222694904c1c682b60343acaa4e..77e5de25b28a772e87a491ec83cd2ec21206b8c2 100644 --- a/arch/xtensa/cpu.mk +++ b/arch/xtensa/cpu.mk @@ -8,8 +8,8 @@ LOSCFG_ARCH_FPU = $(LOSCFG_ARCH_FPU_STRIP) LITEOS_BASELIB += -l$(LOSCFG_ARCH_CPU) -ifeq ($(LOSCFG_ARCH_XTENSA_LX6), y) -XTENSA_ARCH_DIR := lx6 +ifeq ($(LOSCFG_ARCH_XTENSA_LX6)$(LOSCFG_ARCH_XTENSA_L106), y) +XTENSA_ARCH_DIR := lx endif ifeq ($(LOSCFG_ARCH_XTENSA_XEA3), y) XTENSA_ARCH_DIR := xea3 @@ -27,7 +27,7 @@ XTENSA_CORE_OPTS += -DXCHAL_NUM_AREGS=64 -DLOSCFG_DSP_COPROCESS endif XTENSA_SYSTEM = $(XTENSA_TOOL_DIR)/config -ifeq ($(LOSCFG_ARCH_XTENSA_LX6), y) +ifeq ($(LOSCFG_ARCH_XTENSA_LX6)$(LOSCFG_ARCH_XTENSA_L106), y) XTENSA_CORE_OPTS += -mtext-section-literals else XTENSA_CORE_OPTS += --xtensa-core=$(XTENSA_CORE) --xtensa-system=$(XTENSA_SYSTEM) diff --git a/arch/xtensa/lx6/Makefile b/arch/xtensa/lx/Makefile similarity index 61% rename from arch/xtensa/lx6/Makefile rename to arch/xtensa/lx/Makefile index 56b7859252b0d52533a94b667e2fb8e002b96fa3..35de1bb72ffcbdfb124ca0f9eacf6e10bab034b9 100644 --- a/arch/xtensa/lx6/Makefile +++ b/arch/xtensa/lx/Makefile @@ -3,7 +3,12 @@ include $(LITEOSTOPDIR)/config.mk MODULE_NAME := $(LOSCFG_ARCH_CPU) LOCAL_SRCS := $(wildcard src/*.c) $(wildcard src/*.S) -LOCAL_INCLUDE := -I $(LITEOSTOPDIR)/arch/xtensa/lx6/include + +ifneq ($(LOSCFG_XTENSA_WINDOWSPILL), y) +LOCAL_SRCS := $(filter-out src/los_window.S, $(LOCAL_SRCS)) +endif + +LOCAL_INCLUDE := -I $(LITEOSTOPDIR)/arch/xtensa/esp/include LOCAL_FLAGS := $(LOCAL_INCLUDE) $(LITEOS_GCOV_OPTS) diff --git a/arch/xtensa/lx6/include/arch/atomic.h b/arch/xtensa/lx/include/arch/atomic.h similarity index 100% rename from arch/xtensa/lx6/include/arch/atomic.h rename to arch/xtensa/lx/include/arch/atomic.h diff --git a/arch/xtensa/lx6/include/arch/barrier.h b/arch/xtensa/lx/include/arch/barrier.h similarity index 100% rename from arch/xtensa/lx6/include/arch/barrier.h rename to arch/xtensa/lx/include/arch/barrier.h diff --git a/arch/xtensa/lx6/include/arch/cache.h b/arch/xtensa/lx/include/arch/cache.h similarity index 100% rename from arch/xtensa/lx6/include/arch/cache.h rename to arch/xtensa/lx/include/arch/cache.h diff --git a/arch/xtensa/lx6/include/arch/canary.h b/arch/xtensa/lx/include/arch/canary.h similarity index 100% rename from arch/xtensa/lx6/include/arch/canary.h rename to arch/xtensa/lx/include/arch/canary.h diff --git a/arch/xtensa/lx6/include/arch/cpu.h b/arch/xtensa/lx/include/arch/cpu.h similarity index 100% rename from arch/xtensa/lx6/include/arch/cpu.h rename to arch/xtensa/lx/include/arch/cpu.h diff --git a/arch/xtensa/lx6/include/arch/exception.h b/arch/xtensa/lx/include/arch/exception.h similarity index 91% rename from arch/xtensa/lx6/include/arch/exception.h rename to arch/xtensa/lx/include/arch/exception.h index d2a04770984792efbe068a274413f08db730faa1..f456e9fb539a17ca24bfc820196f3a72a2015d38 100644 --- a/arch/xtensa/lx6/include/arch/exception.h +++ b/arch/xtensa/lx/include/arch/exception.h @@ -51,9 +51,11 @@ typedef struct { UINT32 sar; UINT32 excCause; UINT32 excVaddr; +#ifdef LOSCFG_XTENSA_LOOPS UINT32 lbeg; UINT32 lend; UINT32 lcount; +#endif #ifdef LOSCFG_ARCH_FPU_ENABLE UINT32 temp; UINT16 cpenable; @@ -62,7 +64,9 @@ typedef struct { UINT32 fsr; UINT32 regF[SAVED_REGF_NUM]; #endif +#ifdef LOSCFG_XTENSA_WINDOWSPILL UINT32 res[BASE_AREA_REG_NUM]; +#endif } EXC_CONTEXT_S; STATIC INLINE VOID ArchHaltCpu(VOID) @@ -130,9 +134,20 @@ typedef struct TagExcInfo { } ExcInfo; VOID ArchExcInit(VOID); +VOID HakSpillWindow(VOID); +VOID ArchBackTrace(VOID); +VOID ArchBackTraceWithSp(const VOID *stackPointer); extern UINT32 g_curNestCount; extern ExcInfo g_excInfo; +extern CHAR _text_start; +extern CHAR _text_end; +extern CHAR _iram_text_start; +extern CHAR _iram_text_end; +extern CHAR __text_start; +extern CHAR __text_end; +extern CHAR __init_stack_s; +extern CHAR __init_stack_e; #define MAX_INT_INFO_SIZE (8 + 0x164) diff --git a/arch/xtensa/lx6/include/arch/interrupt.h b/arch/xtensa/lx/include/arch/interrupt.h similarity index 100% rename from arch/xtensa/lx6/include/arch/interrupt.h rename to arch/xtensa/lx/include/arch/interrupt.h diff --git a/arch/xtensa/lx6/include/arch/los_arch_macro.h b/arch/xtensa/lx/include/arch/los_arch_macro.h similarity index 87% rename from arch/xtensa/lx6/include/arch/los_arch_macro.h rename to arch/xtensa/lx/include/arch/los_arch_macro.h index e6107f4c630124596c4f9b7c4505eed35114beb8..e6fc076df2bfbbfd407d4763f682655ced7d04c5 100644 --- a/arch/xtensa/lx6/include/arch/los_arch_macro.h +++ b/arch/xtensa/lx/include/arch/los_arch_macro.h @@ -35,6 +35,43 @@ extern "C" { #endif /* __cplusplus */ #endif /* __cplusplus */ +#ifdef LOSCFG_PLATFORM_ESP8266 +.macro LOADSTORE_EXP_POP SP + l32i a0, \SP, 0 + l32i a2, \SP, 0x08 + l32i a3, \SP, 0x0c + l32i a4, \SP, 0x10 +.endm + +.macro LOADSTORE_EXP_PUSH SP + s32i a0, \SP, 0 + s32i a2, \SP, 0x08 + s32i a3, \SP, 0x0c + s32i a4, \SP, 0x10 +.endm + +.macro REG_TABLE REGNUM LABEL + .org .RegTable + 8 * (\REGNUM - 7) + mov a2, a®NUM& + j \LABEL +.endm + +.macro STORE_LOAD_TABLE LAYER + .org .StoreLoadTable + (16 * (\LAYER - 5)) + mov a&LAYER&, a4 + l32i a2, a1, 0x08 + l32i a4, a1, 0x10 + rsr a1, EXCSAVE1 + rfe +.endm + +.macro GET_EXCVADDR VADDR ALIGADDR + movi \ALIGADDR, (~3) + rsr \VADDR, EXCVADDR + and \ALIGADDR, \ALIGADDR, \VADDR +.endm +#endif + .macro POP_ALL_REG SP PC PState #ifdef LOSCFG_ARCH_FPU_ENABLE l16ui a3, \SP, CONTEXT_OFF_CPENABLE @@ -69,13 +106,14 @@ extern "C" { movi a4, 0 s16i a4, \SP, CONTEXT_OFF_CPSTORED #endif /* LOSCFG_ARCH_FPU_ENABLE */ - +#ifdef LOSCFG_XTENSA_LOOPS l32i a3, \SP, CONTEXT_OFF_LBEG l32i a4, \SP, CONTEXT_OFF_LEND wsr a3, LBEG l32i a3, \SP, CONTEXT_OFF_LCOUNT wsr a4, LEND wsr a3, LCOUNT +#endif l32i a3, \SP, CONTEXT_OFF_SAR l32i a1, \SP, CONTEXT_OFF_A1 wsr a3, SAR @@ -119,12 +157,14 @@ extern "C" { s32i a15, \SP, CONTEXT_OFF_A15 rsr a3, SAR s32i a3, \SP, CONTEXT_OFF_SAR +#ifdef LOSCFG_XTENSA_LOOPS rsr a3, LBEG s32i a3, \SP, CONTEXT_OFF_LBEG rsr a3, LEND s32i a3, \SP, CONTEXT_OFF_LEND rsr a3, LCOUNT s32i a3, \SP, CONTEXT_OFF_LCOUNT +#endif rsr a3, PS s32i a3, \SP, CONTEXT_OFF_PS #ifdef LOSCFG_ARCH_FPU_ENABLE diff --git a/arch/xtensa/lx6/include/arch/los_arch_timer.h b/arch/xtensa/lx/include/arch/los_arch_timer.h similarity index 100% rename from arch/xtensa/lx6/include/arch/los_arch_timer.h rename to arch/xtensa/lx/include/arch/los_arch_timer.h diff --git a/arch/xtensa/lx/include/arch/regs.h b/arch/xtensa/lx/include/arch/regs.h new file mode 100644 index 0000000000000000000000000000000000000000..af1382036889356eaf384d8dcc2fa93ae766a5d0 --- /dev/null +++ b/arch/xtensa/lx/include/arch/regs.h @@ -0,0 +1,169 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: CPU Register Defines Headfile + * Author: Huawei LiteOS Team + * Create: 2021-09-07 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- */ + +/** + * @defgroup Special Register Fields and Values + * @ingroup kernel + */ + +#ifndef _ARCH_REGS_H +#define _ARCH_REGS_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define PS_UM_MASK 0x00000020 +#define SPREG_PS_DI_MASK 0x00000008 +#define SPREG_PS_STACK_CROSS 0x00000020 + +/** + * @ingroup Schedule Flag stored on Task Context + */ +#define OS_SCHED_FLAG_TASKPREEMT 4 /* Task Preemted through LOS_Schedule */ + +/** + * @ingroup Context Fields Define + */ +#define CONTEXT_OFF_EPC (0) +#define CONTEXT_OFF_PC (0) +#define CONTEXT_OFF_PS (4) +#define CONTEXT_OFF_A0 (8) +#define CONTEXT_OFF_A1 (12) +#define CONTEXT_OFF_A2 (16) +#define CONTEXT_OFF_A3 (20) +#define CONTEXT_OFF_A4 (24) +#define CONTEXT_OFF_A5 (28) +#define CONTEXT_OFF_A6 (32) +#define CONTEXT_OFF_A7 (36) +#define CONTEXT_OFF_A8 (40) +#define CONTEXT_OFF_A9 (44) +#define CONTEXT_OFF_A10 (48) +#define CONTEXT_OFF_A11 (52) +#define CONTEXT_OFF_A12 (56) +#define CONTEXT_OFF_A13 (60) +#define CONTEXT_OFF_A14 (64) +#define CONTEXT_OFF_A15 (68) +#define CONTEXT_OFF_SAR (72) +#define CONTEXT_OFF_EXCCAUSE (76) +#define CONTEXT_OFF_EXCVADDR (80) +#define CONTEXT_COMMON_SIZE (84) + +#ifdef LOSCFG_XTENSA_LOOPS +#define CONTEXT_OFF_LBEG (84) +#define CONTEXT_OFF_LEND (88) +#define CONTEXT_OFF_LCOUNT (92) +#define CONTEXT_LOOPS_SIZE (12) +#else +#define CONTEXT_LOOPS_SIZE (0) +#endif + +#ifdef LOSCFG_XTENSA_WINDOWSPILL +#define CONTEXT_WINDOWSPILL_SIZE (16) +#define INDEX_OF_ARGS0 (6) +#define WINDOWSTARTBITS (16) /* window start reg bits */ +#define WINDOWBASEBITS (4) /* window base reg bits */ +#define WINDOWSTARTMASK ((1 << WINDOWSTARTBITS) - 1) +#define WOE_ENABLE (0x40000) +#define BIT_CALLINC (16) +#else +#define CONTEXT_WINDOWSPILL_SIZE (0) +#define INDEX_OF_ARGS0 (2) +#endif + +#ifdef LOSCFG_ARCH_FPU_ENABLE +#define CONTEXT_OFF_TMP0 (96) +#define CONTEXT_OFF_CPENABLE (100) +#define CONTEXT_OFF_CPSTORED (102) +#define CONTEXT_OFF_FCR (104) +#define CONTEXT_OFF_FSR (108) +#define CONTEXT_OFF_F0 (112) +#define CONTEXT_OFF_F1 (116) +#define CONTEXT_OFF_F2 (120) +#define CONTEXT_OFF_F3 (124) +#define CONTEXT_OFF_F4 (128) +#define CONTEXT_OFF_F5 (132) +#define CONTEXT_OFF_F6 (136) +#define CONTEXT_OFF_F7 (140) +#define CONTEXT_OFF_F8 (144) +#define CONTEXT_OFF_F9 (148) +#define CONTEXT_OFF_F10 (152) +#define CONTEXT_OFF_F11 (156) +#define CONTEXT_OFF_F12 (160) +#define CONTEXT_OFF_F13 (164) +#define CONTEXT_OFF_F14 (168) +#define CONTEXT_OFF_F15 (172) +#define CONTEXT_FPU_SIZE (80) +#else /* LOSCFG_ARCH_FPU_ENABLE */ +#define CONTEXT_FPU_SIZE (0) +#endif /* !LOSCFG_ARCH_FPU_ENABLE */ + +#define CONTEXT_SIZE (CONTEXT_FPU_SIZE + CONTEXT_LOOPS_SIZE + \ + CONTEXT_COMMON_SIZE + CONTEXT_WINDOWSPILL_SIZE) +#define EXCCAUSE_LEVEL1INTERRUPT 4 +#define XTENSA_LOGREG_NUM 16 +#define INDEX_OF_SP 1 +#define LEVEL_MASK 0xf +#define INT_MASK 5 +#define LEVEL1_INT_MASK 1 +#define USER_VECTOR_MODE 0x20 +#define LEVEL1 1 +#define LEVEL2 2 +#define LEVEL3 3 +#define LEVEL4 4 +#define LEVEL5 5 + +#ifdef LOSCFG_PLATFORM_ESP8266 +#define LOAD_STORE_ERROR_MASK (0x700F) +#define STOTE16_OPCODE (0x5002) +#define STOTE8_OPCODE (0x4002) +#define LOAD16_OPCODE (0x1002) +#define LOAD8_OPCODE (0x2) +#define LOADSTOREEXP_REG_INDEX (0x7) +#define LOADSTOREEXP_TABLEENTRY_SIZE (0x8) +#endif + +#ifdef YES +#undef YES +#endif +#define YES 1 + +#ifdef NO +#undef NO +#endif +#define NO 0 + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _ARCH_REGS_H */ diff --git a/arch/xtensa/lx6/include/arch/spinlock.h b/arch/xtensa/lx/include/arch/spinlock.h similarity index 100% rename from arch/xtensa/lx6/include/arch/spinlock.h rename to arch/xtensa/lx/include/arch/spinlock.h diff --git a/arch/xtensa/lx6/include/arch/task.h b/arch/xtensa/lx/include/arch/task.h similarity index 93% rename from arch/xtensa/lx6/include/arch/task.h rename to arch/xtensa/lx/include/arch/task.h index 18d333908945c5581a86a7b63595c81242306673..794d96f9c67c60412649041f341bc30d2539c393 100644 --- a/arch/xtensa/lx6/include/arch/task.h +++ b/arch/xtensa/lx/include/arch/task.h @@ -46,9 +46,9 @@ extern VOID *g_newTask; #define SAVED_REG_NUM 8 #define SPILL_WINDOW_SIZE 8 -#define SAVED_REGA_NUM 16 -#define SAVED_REGF_NUM 16 -#define BASE_AREA_REG_NUM 4 +#define SAVED_REGA_NUM 16 +#define SAVED_REGF_NUM 16 +#define BASE_AREA_REG_NUM 4 typedef struct { UINT32 pc; @@ -57,9 +57,11 @@ typedef struct { UINT32 sar; UINT32 excCause; UINT32 excVaddr; +#ifdef LOSCFG_XTENSA_LOOPS UINT32 lbeg; UINT32 lend; UINT32 lcount; +#endif #ifdef LOSCFG_ARCH_FPU_ENABLE UINT32 temp; UINT16 cpenable; @@ -68,7 +70,9 @@ typedef struct { UINT32 fsr; UINT32 regF[SAVED_REGF_NUM]; #endif +#ifdef LOSCFG_XTENSA_WINDOWSPILL UINT32 res[BASE_AREA_REG_NUM]; +#endif } TaskContext; STATIC INLINE VOID *ArchCurrTaskGet(VOID) diff --git a/arch/xtensa/lx6/src/canary.c b/arch/xtensa/lx/src/canary.c similarity index 100% rename from arch/xtensa/lx6/src/canary.c rename to arch/xtensa/lx/src/canary.c diff --git a/arch/xtensa/lx6/src/dispatch.S b/arch/xtensa/lx/src/dispatch.S similarity index 90% rename from arch/xtensa/lx6/src/dispatch.S rename to arch/xtensa/lx/src/dispatch.S index e9711c90656b9b75aecfca1c191429b9d31f2ff9..c6cfc955d7219c586bc2a4f75c7480fb17c0b152 100644 --- a/arch/xtensa/lx6/src/dispatch.S +++ b/arch/xtensa/lx/src/dispatch.S @@ -39,7 +39,9 @@ * a3: run task */ OsTaskSchedule: +#ifdef LOSCFG_XTENSA_WINDOWSPILL entry sp, 16 +#endif mov a4, a2 mov a5, a3 addi a2, sp, -CONTEXT_SIZE @@ -50,6 +52,7 @@ OsTaskSchedule: beqi a3, 1, .switchdone s32i a2, a5, 0 /* store old sp */ +#ifdef LOSCFG_XTENSA_WINDOWSPILL l32i a4, a4, 0 /* get new sp */ rsr a5, PS movi a3, ~(WOE_ENABLE | LEVEL_MASK) @@ -59,12 +62,20 @@ OsTaskSchedule: rsync call0 SpillWindow mov a2, a4 - POP_ALL_REG a2 EPC5 EPS5 - rfi 5 +#else + l32i a2, a4, 0 +#endif + POP_ALL_REG a2 EPC2 EPS2 + rfi 2 .switchdone: +#ifdef LOSCFG_XTENSA_WINDOWSPILL retw +#else + ret +#endif +#ifdef LOSCFG_XTENSA_WINDOWSPILL .type HakSpillWindow, %function .global HakSpillWindow .align 4 @@ -92,7 +103,7 @@ HakSpillWindow: l32i a1, a4, CONTEXT_OFF_A1 retw - +#endif /* * a2: new task */ @@ -100,7 +111,9 @@ HakSpillWindow: .global OsStartToRun .align 4 OsStartToRun: +#ifdef LOSCFG_XTENSA_WINDOWSPILL entry sp, 16 +#endif /* disable interrupt */ rsil a3, INT_MASK @@ -112,6 +125,7 @@ OsStartToRun: movi a3, g_newTask s32i a2, a3, 0 +#ifdef LOSCFG_XTENSA_WINDOWSPILL l32i a5, a2, 0 /* get sp */ rsr a4, PS @@ -124,9 +138,11 @@ OsStartToRun: call0 SpillWindow mov a2, a5 - - POP_ALL_REG a2 EPC5 EPS5 - rfi 5 +#else + l32i a2, a2, 0 /* get sp */ +#endif + POP_ALL_REG a2 EPC2 EPS2 + rfi 2 .global SaveRetAddr .type SaveRetAddr, @function diff --git a/arch/xtensa/lx6/src/exception.S b/arch/xtensa/lx/src/exception.S similarity index 67% rename from arch/xtensa/lx6/src/exception.S rename to arch/xtensa/lx/src/exception.S index ecc202463c77eeaa4c219cf6ce81164e7e61a8e6..4123809a59c2a5c83f1cd960bd39f5de0809dfb7 100644 --- a/arch/xtensa/lx6/src/exception.S +++ b/arch/xtensa/lx/src/exception.S @@ -29,7 +29,7 @@ #include "arch/regs.h" #include "arch/los_arch_macro.h" -.extern HalInterrupt +.extern ArchInterrupt .extern UserException .section .iram,"ax" @@ -49,24 +49,180 @@ HandleEntry: rsr a0, EXCSAVE1 s32i a0, sp, CONTEXT_OFF_A0 +#ifdef LOSCFG_XTENSA_WINDOWSPILL wsr a1, EXCSAVE1 l32i a1, a1, CONTEXT_OFF_A1 call0 SpillWindow rsr a1, EXCSAVE1 +#endif rsr a0, EXCCAUSE s32i a0, sp, CONTEXT_OFF_EXCCAUSE rsr a0, EXCVADDR s32i a0, sp, CONTEXT_OFF_EXCVADDR +#ifndef LOSCFG_XTENSA_WINDOWSPILL + movi a0, INT_MASK | USER_VECTOR_MODE +#else movi a0, INT_MASK | USER_VECTOR_MODE | WOE_ENABLE +#endif wsr a0, PS +#ifdef LOSCFG_XTENSA_WINDOWSPILL rsr a6, EPC1 mov a7, sp rsr a8, EXCCAUSE - call4 HalExcHandleEntry + call4 OsExcHandleEntry +#else + rsr a2, EPC1 + mov a3, a1 + rsr a4, EXCCAUSE + movi a0, OsExcHandleEntry + callx0 a0 +#endif 1: j 1b +#ifdef LOSCFG_COMPILER_XTENSA_L106 +.literal_position + .type LoadStoreErr, @function + .balign 4 +LoadStoreErr: + rsr a0, EXCSAVE1 + addi a1, a1, -28 + LOADSTORE_EXP_PUSH a1 + rsr a0, SAR + s32i a0, a1, 4 + rsr a2, EPC1 + ssa8l a2 + srli a2, a2, 2 + slli a2, a2, 2 /* epc1 align 4 byte */ + l32i a4, a2, 0 + l32i a2, a2, 4 + movi a3, LOAD_STORE_ERROR_MASK + src a2, a2, a4 /* get epc1 code */ + and a3, a2, a3 + movi a4, LOAD8_OPCODE + xor a4, a4, a3 + beqz a4, .Load8 + movi a4, LOAD16_OPCODE + xor a4, a4, a3 + beqz a4, .Load16 + movi a4, STOTE8_OPCODE + xor a4, a4, a3 + beqz a4, .Store8 + movi a4, STOTE16_OPCODE + xor a4, a4, a3 + beqz a4, .Store16 + j .ExpCode + + .balign 4 +.Load16: + movi a4, 0xFF00 +.Load8: + GET_EXCVADDR a3, a0 + l32i a0, a0, 0 + ssa8l a3 + srl a3, a0 + addi a4, a4, 0xFF + and a3, a3, a4 + movi a0, 0xFF + beq a4, a0, .CommonLoad + bbci a3, 15, .CommonLoad + movi a4, 0xFFFF0000 + or a3, a3, a4 + j .CommonLoad + +.CommonLoad: + mov a4, a3 + l32i a0, a1, 4 + wsr a0, SAR + rsr a0, EPC1 + addi a0, a0, 0x3 + wsr a0, EPC1 + srli a2, a2, 4 + movi a3, 0xF + and a2, a2, a3 + beqi a2, 1, .GetA1 + bgei a2, 5, .GetTable + addx4 a2, a2, a1 + s32i a4, a2, 0 + LOADSTORE_EXP_POP a1 + addi a1, a1, 28 + rfe + +.GetTable: + movi a3, .StoreLoadTableBase + l32i a0, a1, 0 + slli a2, a2, 4 + add a2, a2, a3 + l32i a3, a1, 0x0c + jx a2 + + .balign 4 +.Store16: + movi a4, 0xFF00 +.Store8: + addi a4, a4, 0xFF + s32i a5, a1, 0x14 + s32i a6, a1, 0x18 + mov a5, a4 + GET_EXCVADDR a6, a4 + GET_EXCVADDR a3, a4 + ssa8b a3 + l32i a3, a4, 0 + sll a4, a5 + movi a6, -1 + xor a4, a6, a4 + and a3, a3, a4 + extui a2, a2, 4, 4 + movi a6, 4 + mull a6, a2, a6 + add a2, a6, a1 + l32i a2, a2, 0 + + and a2, a2, a5 + sll a2, a2 + or a3, a3, a2 + s32i a3, a4, 0 + wsr a0, SAR + rsr a0, EPC1 + addi a0, a0, 0x3 + wsr a0, EPC1 + l32i a5, a1, 0x14 + l32i a6, a1, 0x18 + LOADSTORE_EXP_POP a1 + addi a1, a1, 28 + rfe + +.ExpCode: + wsr a0, SAR + LOADSTORE_EXP_POP a1 + addi a1, a1, 28 + call0 HandleEntry + + .balign 4 +.GetA1: + s32i a4, a1, 0x04 + LOADSTORE_EXP_POP a1 + l32i a1, a1, 0x04 + rfe + + .balign 4 +.StoreLoadTable: + .set .StoreLoadTableBase, .StoreLoadTable - 80 + STORE_LOAD_TABLE 5 + STORE_LOAD_TABLE 6 + STORE_LOAD_TABLE 7 + STORE_LOAD_TABLE 8 + STORE_LOAD_TABLE 9 + STORE_LOAD_TABLE 10 + STORE_LOAD_TABLE 11 + STORE_LOAD_TABLE 12 + STORE_LOAD_TABLE 13 + STORE_LOAD_TABLE 14 + STORE_LOAD_TABLE 15 +.balign 4 +#endif + .begin literal_prefix .DebugExceptionHandler .section .DebugExceptionHandler.text, "ax" .global DebugExceptionHandler @@ -96,9 +252,6 @@ NMIExceptionHandler: .literal_position DoubleExceptionHandler: - movi a0, INT_MASK | USER_VECTOR_MODE | WOE_ENABLE - wsr a0, PS - rsr a2, EXCCAUSE call0 UserException .end literal_prefix @@ -132,9 +285,9 @@ KernelException: .literal_position UserExceptionHandler: - wsr a0, EXCSAVE1 + wsr a0, EXCSAVE1 /* save lr */ + wsr a1, EXCSAVE2 call0 UserException - .end literal_prefix .section .iram,"ax" @@ -142,11 +295,13 @@ UserExceptionHandler: .align 4 UserException: - rsr a0, EXCCAUSE + rsr a0, EXCCAUSE /* read reason */ +#ifdef LOSCFG_COMPILER_XTENSA_L106 + beqi a0, 3, LoadStoreErr +#endif beqi a0, 4, InterruptEntry1 - call0 HandleEntry -1: - j 1b + j HandleEntry + .section .iram,"ax" .type InterruptEntry1,@function @@ -164,20 +319,28 @@ InterruptEntry1: rsr a0, EXCSAVE1 s32i a0, sp, CONTEXT_OFF_A0 +#ifdef LOSCFG_XTENSA_WINDOWSPILL wsr a1, EXCSAVE1 l32i a1, a1, CONTEXT_OFF_A1 call0 SpillWindow rsr a1, EXCSAVE1 - movi a0, LEVEL1_INT_MASK | USER_VECTOR_MODE | WOE_ENABLE +#else + movi a0, LEVEL1_INT_MASK | USER_VECTOR_MODE +#endif + wsr a0, PS rsync - - call4 HalInterrupt +#ifdef LOSCFG_XTENSA_WINDOWSPILL + call4 ArchInterrupt +#else + call0 ArchInterrupt +#endif mov a2, a1 POP_ALL_REG a2 EPC1 PS rfe +#ifdef LOSCFG_COMPILER_XTENSA_LX6 .begin literal_prefix .InterruptEntry2 .section .InterruptEntry2.text, "ax" .global InterruptEntry2 @@ -233,7 +396,9 @@ InterruptEntry5: call0 HandleEntry .end literal_prefix +#endif +#ifdef LOSCFG_XTENSA_WINDOWSPILL .section .WindowVectors.text, "ax" .org 0x0 @@ -358,3 +523,4 @@ UnderFlowGroup3: l32i a5, a4, 4 l32i a4, a4, 0 rfwu +#endif diff --git a/arch/xtensa/lx/src/fault.c b/arch/xtensa/lx/src/fault.c new file mode 100644 index 0000000000000000000000000000000000000000..aa59ccb9d9bbe56c82d1fa6c5c0873da06aae741 --- /dev/null +++ b/arch/xtensa/lx/src/fault.c @@ -0,0 +1,394 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Xtensa Lx6 Exception Handler Implementation + * Author: Huawei LiteOS Team + * Create: 2021-09-07 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include "arch/exception.h" +#include "los_task_pri.h" +#include "los_typedef.h" +#include "los_printf_pri.h" +#include "xtensa_lx6.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +ExcInfo g_excInfo = {0}; + +UINT32 HwiNumValid(UINT32 num) +{ + return (num >= OS_SYS_VECTOR_CNT) && (num <= OS_VECTOR_CNT); +} + +VOID ArchExcInit(VOID) +{ +} + +UINT32 ArchGetCurrentPc(VOID) +{ + UINT32 pc; + __asm__ volatile("mov %0, a0 " : "=r"(pc) : : "memory"); + return pc; +} + +STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo) +{ + CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"}; + + PrintExcInfo("Type = %d\n" + "ThrdPid = %d\n" + "Phase = %s\n" + "FaultAddr = 0x%x\n", + excInfo->type, + excInfo->thrdPid, + phaseStr[excInfo->phase], + excInfo->faultAddr); +} + +STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo) +{ + PrintExcInfo("Current task info:\n"); + if (excInfo->phase == OS_EXC_IN_TASK) { + LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet()); + PrintExcInfo("Task name = %s\n" + "Task Id = %d\n" + "Task stackSize = 0x%x\n" + "Task stackPointer = 0x%x\n" + "Task topOfStack = 0x%x\n", + taskCB->taskName, + taskCB->taskId, + taskCB->stackSize, + (UINT32)taskCB->stackPointer, + taskCB->topOfStack); + } else if (excInfo->phase == OS_EXC_IN_HWI) { + PrintExcInfo("Exception occur in interrupt phase!\n"); + } else { + PrintExcInfo("Exception occur in system init phase!\n"); + } +} + +STATIC VOID OsExcRegInfo(const ExcInfo *excInfo) +{ + INT32 index; + PrintExcInfo("Exception reg dump:\n" + "sar = 0x%x\n" + "excCause = 0x%x\n" + "excVaddr = 0x%x\n" +#ifdef LOSCFG_XTENSA_LOOPS + "lbeg = 0x%x\n" + "lend = 0x%x\n" + "lcount = 0x%x\n" +#endif + "pc = 0x%x\n" + "ps = 0x%x\n", + excInfo->context->sar, excInfo->context->excCause, excInfo->context->excVaddr, +#ifdef LOSCFG_XTENSA_LOOPS + excInfo->context->lbeg, excInfo->context->lend, excInfo->context->lcount, +#endif + excInfo->context->pc, excInfo->context->ps); + for (index = 0; index < XTENSA_LOGREG_NUM; index++) { + PrintExcInfo("regA%d = 0x%x\n", index, excInfo->context->regA[index]); + } +} + +#ifdef LOSCFG_BACKTRACE +#ifdef LOSCFG_COMPILER_XTENSA_L106 +STATIC UINT32 CurrentTextOffset(const UINT32 pc) +{ + UINT32 size; + if (pc > (UINT32)&_text_start && pc < (UINT32)&_text_end) { + size = pc - (UINT32)&_text_start; + } else if ((pc > (UINT32)&_iram_text_start) && (pc < (UINT32)&_iram_text_end)) { + size = pc - (UINT32)&_iram_text_start; + } else { + size = 0; + } + return size; +} + +UINT32 ArchBackTraceGet(UINTPTR pc, UINTPTR sp, UINTPTR lr, UINTPTR *backPc, UINTPTR *backSp) +{ + UINT32 offset; + UINT8 *tmp = NULL; + BOOL flag = FALSE; + INT32 stackSize; + const UINT32 size = CurrentTextOffset(pc); + for (offset = 0; offset < size; offset++) { + tmp = (UINT8 *)(pc - offset); + /* the instuction of addi a1,a1,xx */ + if ((tmp[0] == 0x12) && (tmp[1] == 0xc1)) { + /* get the stack size */ + stackSize = (INT32)(INT8)tmp[2]; + if ((stackSize >= 0) || (stackSize % 16 != 0)) { + continue; + } + + sp -= stackSize; + if (flag == FALSE) { + pc = lr; + } else { + pc = *(UINT32 *)(sp - 4); + } + break; + /* the instruction of movi xx,xx; sub a1, a1, xx */ + } else if ((tmp[0] == 0x92) && ((tmp[1] & 0xf0) == 0xa0) && + (tmp[3] == 0x90) && (tmp[4] == 0x11) && (tmp[5] == 0xc0)) { + stackSize = (UINT32)((((UINT16)(tmp[1] & 0xF)) << 8) + (UINT16)tmp[2]); + if (stackSize <= 0) { + continue; + } + + sp += stackSize; + if (flag == 0) { + pc = lr; + }else{ + pc = *(UINT32 *)(sp - 4); + } + break; + /* the instruction of ret.n */ + } else if ((tmp[0] == 0x0d) && (tmp[1] == 0xf0)) { + pc = lr; + break; + /* the instruction of s32i a0, a1, xx */ + } else if ((tmp[0] == 0x02) && (tmp[1] == 0x61)) { + flag = TRUE; + } + } + if (offset < size) { + *backSp = sp; + *backPc = pc; + return (CurrentTextOffset(*backPc) ? 1 : 0); + } + return 0; +} + +VOID BackTraceSub(UINTPTR sp) +{ + EXC_CONTEXT_S * context = (EXC_CONTEXT_S *)sp; + UINTPTR tmpSp; + UINTPTR tmpRa; + UINTPTR backPc; + UINTPTR backRa; + UINTPTR backSp; + + backRa = (UINTPTR)context->regA[0]; + backPc = (UINTPTR)context->pc; + backSp = (UINTPTR)context->regA[1]; + PrintExcInfo("backtrace 0x%x -- lr = 0x%x\n", (VOID *)backSp, (VOID *)backPc); + while (ArchBackTraceGet(backPc, backSp, backRa, &tmpRa, &tmpSp)) { + PrintExcInfo("backtrace 0x%x -- lr = 0x%x\n", (VOID *)tmpSp, (VOID *)tmpRa); + backPc = tmpRa; + backSp = tmpSp; + } + PrintExcInfo("----- backtrace end -----\n"); +} +#elif defined (LOSCFG_COMPILER_XTENSA_LX6) +#define OS_BACKTRACE_START 0 +#define ALIGN_MASK (0x3) +#define OS_REG_LR_OFFSET (CONTEXT_SIZE - 8) +#define VIR_TEXT_ADDR_MASK 0x80000000 +#define TEXT_ADDR_MASK 0x40000000 +#define RA_OFFSET 16 +#define SP_OFFSET 12 + +BOOL OsStackDataIsCodeAddr(UINTPTR value) +{ + if ((value >= (UINTPTR)&__text_start) && (value < (UINTPTR)&__text_end)) { + return TRUE; + } + if ((value >= (UINTPTR)&_text_start) && (value < (UINTPTR)&_text_end)) { + return TRUE; + } + return FALSE; +} + +BOOL IsValidRa(UINTPTR regRA) +{ + regRA &= ~VIR_TEXT_ADDR_MASK; + regRA |= TEXT_ADDR_MASK; + + return OsStackDataIsCodeAddr(regRA); +} + +UINT32 IsSpAligned(UINT32 value) +{ + return (value & (UINT32)(ALIGN_MASK)) == 0; +} + +BOOL IsValidSP(UINTPTR regSP, UINTPTR start, UINTPTR end) +{ + return (regSP >= start) && (regSP <= end) && IsSpAligned(regSP); +} + +STATIC BOOL FindSuitableStack(UINTPTR regSP, UINTPTR *start, UINTPTR *end) +{ + UINT32 index, stackStart, stackEnd; + BOOL found = FALSE; + LosTaskCB *taskCB = NULL; + + /* Search in the task stacks */ + for (index = 0; index < g_taskMaxNum; index++) { + taskCB = OS_TCB_FROM_TID(index); + if (taskCB->taskStatus & OS_TASK_STATUS_UNUSED) { + continue; + } + + stackStart = taskCB->topOfStack; + stackEnd = taskCB->topOfStack + taskCB->stackSize; + if (IsValidSP(regSP, stackStart, stackEnd)) { + found = TRUE; + goto FOUND; + } + } + + if (IsValidSP(regSP, (UINTPTR)&__init_stack_s, (UINTPTR)&__init_stack_e)) { + stackStart = (UINTPTR)&__init_stack_s; + stackEnd = (UINTPTR)&__init_stack_e; + found = TRUE; + goto FOUND; + } + +FOUND: + if (found == TRUE) { + *start = stackStart; + *end = stackEnd; + } + + return found; +} + +VOID ArchBackTraceGet(UINTPTR sp, UINT32 retAddr) +{ + UINTPTR tmpSp; + UINT32 tmpRa; + UINTPTR backRa = retAddr; + UINTPTR backSp = sp; + UINTPTR stackStart; + UINT32 stackEnd; + + if (FindSuitableStack(sp, &stackStart, &stackEnd) == FALSE) { + PRINTK("sp:0x%x error, backtrace failed!\n", sp); + return; + } + while (IsValidSP(backSp, stackStart, stackEnd)) { + backRa &= ~VIR_TEXT_ADDR_MASK; + backRa |= TEXT_ADDR_MASK; + PrintExcInfo("backtrace 0x%x -- lr = 0x%x\n", (VOID *)backSp, (VOID *)backRa); + + tmpRa = backRa; + tmpSp = backSp; + backRa = *((UINT32 *)(UINTPTR)(tmpSp - RA_OFFSET)); + backSp = *((UINT32 *)(UINTPTR)(tmpSp - SP_OFFSET)); + if ((tmpRa == backRa) || (backSp == tmpSp) || !IsValidRa(backRa)) { + break; + } + } +} + +VOID BackTraceSub(UINTPTR sp) +{ + UINTPTR reglr; + sp = ((EXC_CONTEXT_S *)sp)->regA[1]; + reglr = ((EXC_CONTEXT_S *)sp)->regA[0]; + HakSpillWindow(); + ArchBackTraceGet(sp, reglr); +} +#endif + +STATIC VOID BackTraceWithSp(UINTPTR sp) +{ + PrintExcInfo("*******backtrace begin*******\n"); + BackTraceSub(sp); + PrintExcInfo("*******backtrace end*******\n"); +} +#endif + +VOID ArchBackTraceWithSp(const VOID *stackPointer) +{ +#ifdef LOSCFG_BACKTRACE + BackTraceWithSp((UINTPTR)stackPointer); +#else + (VOID)stackPointer; +#endif +} + +VOID ArchBackTrace(VOID) +{ +#ifdef LOSCFG_BACKTRACE + + EXC_CONTEXT_S context; + __asm__ volatile("mov %0, a1 " : "=a"(context.regA[1]) : : "memory"); + __asm__ volatile("mov %0, a0 " : "=a"(context.regA[0]) : : "memory"); + context.pc = ArchGetCurrentPc(); + PrintExcInfo("sp:0x%08x\n", context.regA[1]); + BackTraceWithSp((UINTPTR)(&context)); +#endif +} + +STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo) +{ + PrintExcInfo("*************Exception Information**************\n"); + OsExcTypeInfo(excInfo); + OsExcCurTaskInfo(excInfo); + OsExcRegInfo(excInfo); +} + +__attribute__((section(".iram1"))) VOID OsExcHandleEntry(UINT32 faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type) +{ + g_excInfo.nestCnt++; + g_excInfo.faultAddr = faultAddr; + g_excInfo.type = (UINT16)type; + + LosTaskCB *taskCB = (LosTaskCB *)g_newTask; + if ((taskCB == NULL) || (taskCB == OS_TCB_FROM_TID(g_taskMaxNum))) { + g_excInfo.phase = OS_EXC_IN_INIT; + g_excInfo.thrdPid = OS_NULL_INT; + } else if (ArchCurIrqGet() != OS_NULL_INT) { + g_excInfo.phase = OS_EXC_IN_HWI; + g_excInfo.thrdPid = ArchCurIrqGet(); + } else { + g_excInfo.phase = OS_EXC_IN_TASK; + g_excInfo.thrdPid = taskCB->taskId; + } + + g_excInfo.context = excBufAddr; + + OsExcInfoDisplay(&g_excInfo); +#ifdef LOSCFG_BACKTRACE + ArchBackTraceWithSp((VOID *)excBufAddr); +#endif + for (;;) { + + } +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/arch/xtensa/lx6/src/los_window.S b/arch/xtensa/lx/src/los_window.S similarity index 100% rename from arch/xtensa/lx6/src/los_window.S rename to arch/xtensa/lx/src/los_window.S diff --git a/arch/xtensa/lx6/src/task.c b/arch/xtensa/lx/src/task.c similarity index 90% rename from arch/xtensa/lx6/src/task.c rename to arch/xtensa/lx/src/task.c index 0c9911e11fe22152f632a1f16d70a49361d1a7db..2b7cbe555ad190b1dc4574c44f2d81f48b3a753f 100644 --- a/arch/xtensa/lx6/src/task.c +++ b/arch/xtensa/lx/src/task.c @@ -35,6 +35,8 @@ extern "C" { #endif /* __cplusplus */ #endif /* __cplusplus */ +#define STACK_ALING (0xF) + /* Save the TaskTcb of the new task */ VOID *g_newTask = NULL; @@ -60,9 +62,11 @@ UINT32 g_stackDefault[] = { 0x00000000, /* REG_OFF_RESERVED */ 0x00000000, /* REG_OFF_EXCCAUSE */ 0x00000000, /* REG_OFF_EXCVASSR */ +#ifdef LOSCFG_XTENSA_LOOPS 0x00000000, /* REG_OFF_LCOUNT */ 0x00000000, /* REG_OFF_LEND */ 0x00000000, /* REG_OFF_LBEG */ +#endif #ifdef LOSCFG_ARCH_FPU_ENABLE 0x00000000, /* REG_OFF_TMP0 */ 0x00000000, /* REG_OFF_CPENABLE | CONTEXT_OFF_CPSTORED */ @@ -85,10 +89,12 @@ UINT32 g_stackDefault[] = { 0x00000000, /* REG_OFF_F14 */ 0x00000000, /* REG_OFF_F15 */ #endif /* LOSCFG_ARCH_FPU_ENABLE */ +#ifdef LOSCFG_XTENSA_WINDOWSPILL 0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_SPILL_RESERVED */ +#endif }; LITE_OS_SEC_TEXT_MINOR VOID OsTaskExit(VOID) @@ -109,8 +115,7 @@ LITE_OS_SEC_TEXT_INIT VOID *OsTaskStackInit(UINT32 taskId, UINT32 stackSize, VOI } *((UINT32 *)(topStack)) = OS_STACK_MAGIC_WORD; - taskContext = (TaskContext *)((((UINTPTR)topStack + stackSize) - sizeof(TaskContext))); - + taskContext = (TaskContext *)(((((UINTPTR)topStack + stackSize) - sizeof(TaskContext))) & ~STACK_ALING); /* initialize the task context */ result = memcpy_s(taskContext, sizeof(TaskContext), g_stackDefault, sizeof(TaskContext)); if (result != EOK) { @@ -118,10 +123,13 @@ LITE_OS_SEC_TEXT_INIT VOID *OsTaskStackInit(UINT32 taskId, UINT32 stackSize, VOI } taskContext->pc = (UINT32)(UINTPTR)OsTaskEntry; - taskContext->regA[INDEX_OF_SP] = (UINTPTR)topStack + stackSize; /* endStack */ - taskContext->regA[INDEX_OF_ARGS0] = taskId; /* argument1 */ + taskContext->regA[INDEX_OF_SP] = ((UINTPTR)topStack + stackSize) & ~STACK_ALING; /* endStack */ + taskContext->regA[INDEX_OF_ARGS0] = taskId; /* argument1 */ +#ifdef LOSCFG_XTENSA_WINDOWSPILL taskContext->ps = SPREG_PS_STACK_CROSS | WOE_ENABLE | 1 << BIT_CALLINC; /* set to kernel stack */ - +#else + taskContext->ps = SPREG_PS_STACK_CROSS; /* set to kernel stack */ +#endif #ifdef LOSCFG_ARCH_FPU_ENABLE taskContext->cpenable = 1; /* 1: enable */ #endif diff --git a/arch/xtensa/lx6/include/arch/regs.h b/arch/xtensa/lx6/include/arch/regs.h deleted file mode 100644 index 1c03faa948dcef85cc05e5fed79b11fddb49f1f5..0000000000000000000000000000000000000000 --- a/arch/xtensa/lx6/include/arch/regs.h +++ /dev/null @@ -1,180 +0,0 @@ -/* ---------------------------------------------------------------------------- - * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. - * Description: CPU Register Defines Headfile - * Author: Huawei LiteOS Team - * Create: 2021-09-07 - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- */ - -/** - * @defgroup Special Register Fields and Values - * @ingroup kernel - */ - -#ifndef _ARCH_REGS_H -#define _ARCH_REGS_H - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -/* PS register -- imprecise exception */ -#define SPREG_PS_DEPC_SHIFT 4 -#define SPREG_PS_DEPC_MASK 0x00000004 -#define SPREG_PS_DEPC SPREG_PS_DEPC_MASK -/* PS register -- interrupt part */ -#define SPREG_PS_DI_SHIFT 3 -#define SPREG_PS_DI_MASK 0x00000008 -#define SPREG_PS_DI SPREG_PS_DI_MASK -#define SPREG_PS_DI_DEPC 0x0000000C -/* PS register -- stack part */ -#define SPREG_PS_STACK_SHIFT 5 -#define SPREG_PS_STACK_MASK 0x000000E0 -#define SPREG_PS_STACK_INTERRUPT 0x00000000 -#define SPREG_PS_STACK_CROSS 0x00000020 -#define SPREG_PS_STACK_IDLE 0x00000040 -#define SPREG_PS_STACK_KERNEL 0x00000060 -#define SPREG_PS_STACK_PAGE 0x000000E0 -#define SPREG_PS_STACK_FIRSTINT 0x00000080 -#define SPREG_PS_STACK_FIRSTKER 0x000000A0 -/* PS register -- entry no rotate */ -#define SPREG_PS_ENTRYNR_SHIFT 22 -#define SPREG_PS_ENTRYNR_MASK 0x00400000 -#define SPREG_PS_ENTRYNR SPREG_PS_ENTRYNR_MASK - -/* Exccause Register -- cause */ -#define SPREG_EXCCAUSE_CAUSE_SHIFT 0 -#define SPREG_EXCCAUSE_CAUSE_BITS 4 -#define SPREG_EXCCAUSE_CAUSE_MASK 0x0000000F - -/** - * @ingroup Execute level of core - */ -#define EXEC_LEVEL_APPLICATION_CODE 2 -#define EXEC_LEVEL_EXCEPTION_HANDLER 3 -#define EXEC_LEVEL_INTERRUPT_HANDLER 4 -#define EXEC_LEVEL_NON_INTERRUPTIBLE 5 - -/** - * @ingroup Schedule Flag stored on Task Context - */ -#define OS_SCHED_FLAG_TASKPREEMT 4 /* Task Preemted through LOS_Schedule */ - -/** - * @ingroup Context Fields Define - */ -#define CONTEXT_OFF_EPC 0 -#define CONTEXT_OFF_PC 0 /* reuse with EPC */ -#define CONTEXT_OFF_PS 4 -#define CONTEXT_OFF_A0 8 -#define CONTEXT_OFF_A1 12 -#define CONTEXT_OFF_A2 16 -#define CONTEXT_OFF_A3 20 -#define CONTEXT_OFF_A4 24 -#define CONTEXT_OFF_A5 28 -#define CONTEXT_OFF_A6 32 -#define CONTEXT_OFF_A7 36 -#define CONTEXT_OFF_A8 40 -#define CONTEXT_OFF_A9 44 -#define CONTEXT_OFF_A10 48 -#define CONTEXT_OFF_A11 52 -#define CONTEXT_OFF_A12 56 -#define CONTEXT_OFF_A13 60 -#define CONTEXT_OFF_A14 64 -#define CONTEXT_OFF_A15 68 -#define CONTEXT_OFF_RESERVED 72 -#define CONTEXT_OFF_SAR 72 -#define CONTEXT_OFF_SCHED_FLAG 76 /* reuse with exccause */ -#define CONTEXT_OFF_EXCCAUSE 76 -#define CONTEXT_OFF_EXCVADDR 80 -#define CONTEXT_OFF_LBEG 84 -#define CONTEXT_OFF_LEND 88 -#define CONTEXT_OFF_LCOUNT 92 - -#ifdef LOSCFG_ARCH_FPU_ENABLE -#define CONTEXT_OFF_TMP0 96 -#define CONTEXT_OFF_CPENABLE 100 -#define CONTEXT_OFF_CPSTORED 102 -#define CONTEXT_OFF_FCR 104 -#define CONTEXT_OFF_FSR 108 -#define CONTEXT_OFF_F0 112 -#define CONTEXT_OFF_F1 116 -#define CONTEXT_OFF_F2 120 -#define CONTEXT_OFF_F3 124 -#define CONTEXT_OFF_F4 128 -#define CONTEXT_OFF_F5 132 -#define CONTEXT_OFF_F6 136 -#define CONTEXT_OFF_F7 140 -#define CONTEXT_OFF_F8 144 -#define CONTEXT_OFF_F9 148 -#define CONTEXT_OFF_F10 152 -#define CONTEXT_OFF_F11 156 -#define CONTEXT_OFF_F12 160 -#define CONTEXT_OFF_F13 164 -#define CONTEXT_OFF_F14 168 -#define CONTEXT_OFF_F15 172 -#define CONTEXT_SIZE 192 -#else /* LOSCFG_ARCH_FPU_ENABLE */ -#define CONTEXT_SIZE 112 -#endif /* !LOSCFG_ARCH_FPU_ENABLE */ - -#define EXCCAUSE_LEVEL1INTERRUPT 4 -#define XTENSA_LOGREG_NUM 16 -#define INDEX_OF_SP 1 -#define INDEX_OF_ARGS0 6 - -#define WINDOWSTARTBITS 16 /* window start reg bits */ -#define WINDOWBASEBITS 4 /* window base reg bits */ -#define WINDOWSTARTMASK ((1 << WINDOWSTARTBITS) - 1) - -#define WOE_ENABLE 0x40000 -#define BIT_CALLINC 16 -#define LEVEL_MASK 0xf -#define INT_MASK 5 -#define LEVEL1_INT_MASK 1 -#define USER_VECTOR_MODE 0x20 -#define LEVEL1 1 -#define LEVEL2 2 -#define LEVEL3 3 -#define LEVEL4 4 -#define LEVEL5 5 - -#ifdef YES -#undef YES -#endif -#define YES 1 - -#ifdef NO -#undef NO -#endif -#define NO 0 - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -#endif /* _ARCH_REGS_H */ diff --git a/arch/xtensa/lx6/src/fault.c b/arch/xtensa/lx6/src/fault.c deleted file mode 100644 index c544c0ed567c145b4d18ba8d6b57c01aac23a111..0000000000000000000000000000000000000000 --- a/arch/xtensa/lx6/src/fault.c +++ /dev/null @@ -1,222 +0,0 @@ -/* ---------------------------------------------------------------------------- - * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. - * Description: Xtensa Lx6 Exception Handler Implementation - * Author: Huawei LiteOS Team - * Create: 2021-09-07 - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * --------------------------------------------------------------------------- */ - -#include "arch/exception.h" -#include "los_task_pri.h" -#include "los_typedef.h" -#include "los_printf_pri.h" -#include "xtensa_lx6.h" - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -ExcInfo g_excInfo = {0}; - -UINT32 HwiNumValid(UINT32 num) -{ - return (num >= OS_SYS_VECTOR_CNT) && (num <= OS_VECTOR_CNT); -} - -VOID ArchExcInit(VOID) -{ -} -/* * - * @ingroup los_hwi - * Determine if the interrupt is locked - */ -STATIC INLINE UINT32 HalIntLocked(VOID) -{ - UINT32 intSave; - __asm__ volatile("rsr %0, ps " : "=r"(intSave) : : "memory"); - - return (intSave & SPREG_PS_DI_MASK); -} - -#if (LOSCFG_KERNEL_PRINTF != 0) -STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo) -{ - CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"}; - - PrintExcInfo("Type = %d\n" - "ThrdPid = %d\n" - "Phase = %s\n" - "FaultAddr = 0x%x\n", - excInfo->type, - excInfo->thrdPid, - phaseStr[excInfo->phase], - excInfo->faultAddr); -} - -STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo) -{ - PrintExcInfo("Current task info:\n"); - if (excInfo->phase == OS_EXC_IN_TASK) { - LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet()); - PrintExcInfo("Task name = %s\n" - "Task Id = %d\n" - "Task stackSize = 0x%x\n" - "Task stackPointer = 0x%x\n" - "Task topOfStack = 0x%x\n", - taskCB->taskName, - taskCB->taskId, - taskCB->stackSize, - (UINT32)taskCB->stackPointer, - taskCB->topOfStack); - } else if (excInfo->phase == OS_EXC_IN_HWI) { - PrintExcInfo("Exception occur in interrupt phase!\n"); - } else { - PrintExcInfo("Exception occur in system init phase!\n"); - } -} - -STATIC VOID OsExcRegInfo(const ExcInfo *excInfo) -{ - INT32 index; - PrintExcInfo("Exception reg dump:\n" - "sar = 0x%x\n" - "excCause = 0x%x\n" - "excVaddr = 0x%x\n" - "lbeg = 0x%x\n" - "lend = 0x%x\n" - "lcount = 0x%x\n" - "pc = 0x%x\n" - "ps = 0x%x\n", - excInfo->context->sar, excInfo->context->excCause, excInfo->context->excVaddr, - excInfo->context->lbeg, excInfo->context->lend, excInfo->context->lcount, - excInfo->context->pc, excInfo->context->ps); - for (index = 0; index < XTENSA_LOGREG_NUM; index++) { - PrintExcInfo("regA%d = 0x%x\n", index, excInfo->context->regA[index]); - } -} - -STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo) -{ - UINT32 LR[LOSCFG_BACKTRACE_DEPTH] = {0}; - UINT32 index; - - OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->regA[1]); - - PrintExcInfo("----- backtrace begin -----\n"); - for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) { - if (LR[index] == 0) { - break; - } - PrintExcInfo("backtrace %d -- lr = 0x%x\n", index, LR[index]); - } - PrintExcInfo("----- backtrace end -----\n"); -} - -STATIC VOID OsExcMemPoolCheckInfo(VOID) -{ - PrintExcInfo("\r\nmemory pools check:\n"); -#if (LOSCFG_PLATFORM_EXC == 1) - MemInfoCB memExcInfo[OS_SYS_MEM_NUM]; - UINT32 errCnt; - UINT32 i; - - (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo)); - - errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo); - if (errCnt < OS_SYS_MEM_NUM) { - errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt); - } - - if (errCnt == 0) { - PrintExcInfo("all memory pool check passed!\n"); - return; - } - - for (i = 0; i < errCnt; i++) { - PrintExcInfo("pool num = %d\n", i); - PrintExcInfo("pool type = %d\n", memExcInfo[i].type); - PrintExcInfo("pool addr = 0x%x\n", memExcInfo[i].startAddr); - PrintExcInfo("pool size = 0x%x\n", memExcInfo[i].size); - PrintExcInfo("pool free = 0x%x\n", memExcInfo[i].free); - PrintExcInfo("pool blkNum = %d\n", memExcInfo[i].blockSize); - PrintExcInfo("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr); - PrintExcInfo("pool error node len = 0x%x\n", memExcInfo[i].errorLen); - PrintExcInfo("pool error node owner = %d\n", memExcInfo[i].errorOwner); - } -#endif - UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR); - if (ret == LOS_OK) { - PrintExcInfo("system heap memcheck over, all passed!\n"); - } - - PrintExcInfo("memory pool check end!\n"); -} -#endif - -STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo) -{ -#if (LOSCFG_KERNEL_PRINTF != 0) - PrintExcInfo("*************Exception Information**************\n"); - OsExcTypeInfo(excInfo); - OsExcCurTaskInfo(excInfo); - OsExcRegInfo(excInfo); - OsExcBackTraceInfo(excInfo); - OsGetAllTskInfo(); - OsExcMemPoolCheckInfo(); -#endif -} - -VOID HalExcHandleEntry(UINT32 faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type) -{ - g_excInfo.nestCnt++; - g_excInfo.faultAddr = faultAddr; - g_excInfo.type = (UINT16)type; - - LosTaskCB *taskCB = (LosTaskCB *)g_newTask; - - if ((taskCB == NULL) || (taskCB == OS_TCB_FROM_TID(g_taskMaxNum))) { - g_excInfo.phase = OS_EXC_IN_INIT; - g_excInfo.thrdPid = OS_NULL_INT; - } else if (HalIntNumGet() != OS_NULL_INT) { - g_excInfo.phase = OS_EXC_IN_HWI; - g_excInfo.thrdPid = HalIntNumGet(); - } else { - g_excInfo.phase = OS_EXC_IN_TASK; - g_excInfo.thrdPid = taskCB->taskId; - } - - g_excInfo.context = excBufAddr; - - OsExcInfoDisplay(&g_excInfo); - for (;;) { - - } -} - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ diff --git a/build/mk/compiler_gcc.mk b/build/mk/compiler_gcc.mk index f7294a334c8a94bec24baf1a42356ba50ce63d61..bd2f1ee7fd3b15a22031f0ae19f54f1587a0c5de 100644 --- a/build/mk/compiler_gcc.mk +++ b/build/mk/compiler_gcc.mk @@ -35,6 +35,8 @@ ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := riscv64-unknown-elf- else ifeq ($(LOSCFG_COMPILER_XTENSA_LX6), y) CROSS_COMPILE := xtensa-esp32-elf- + else ifeq ($(LOSCFG_COMPILER_XTENSA_L106), y) + CROSS_COMPILE := xtensa-lx106-elf- endif endif @@ -107,7 +109,7 @@ endif ifeq ($(wildcard $(GCC_GCCLIB_PATH)/$(LITEOS_GCCLIB)),) GCC_USE_CPU_OPT := n endif -ifeq ($(LOSCFG_ARCH_XTENSA_LX6), y) +ifeq ($(LOSCFG_ARCH_XTENSA_LX6)$(LOSCFG_ARCH_XTENSA_L106), y) GCC_USE_CPU_OPT := n endif diff --git a/build/mk/los_config.mk b/build/mk/los_config.mk index 89c3b8ddd95097918a653ce13578639abb2f855e..50dabaa35cfbc337de27112b721b86674535e43d 100644 --- a/build/mk/los_config.mk +++ b/build/mk/los_config.mk @@ -118,7 +118,7 @@ LITEOS_CMACRO += -D__LITEOS__ -DSECUREC_IN_KERNEL=0 -D_ALL_SOURCE ifneq ($(LOSCFG_ARCH_XTENSA_LX6), y) LITEOS_BASELIB += -lgcc endif -ifneq ($(LOSCFG_COMPILER_ARM_NONE_EABI)$(LOSCFG_COMPILER_RISCV_UNKNOWN)$(LOSCFG_COMPILER_RISCV_NULEI)$(LOSCFG_COMPILER_XTENSA_LX6)$(LOSCFG_COMPILER_XTENSA_32)$(LOSCFG_COMPILER_CSKYV2)$(LOSCFG_COMPILER_RISCV64_UNKNOWN)$(LOSCFG_COMPILER_GCC_64), y) +ifneq ($(LOSCFG_COMPILER_ARM_NONE_EABI)$(LOSCFG_COMPILER_RISCV_UNKNOWN)$(LOSCFG_COMPILER_RISCV_NULEI)$(LOSCFG_COMPILER_XTENSA_LX6)$(LOSCFG_COMPILER_XTENSA_L106)$(LOSCFG_COMPILER_XTENSA_32)$(LOSCFG_COMPILER_CSKYV2)$(LOSCFG_COMPILER_RISCV64_UNKNOWN)$(LOSCFG_COMPILER_GCC_64), y) LITEOS_BASELIB += -lgcc_eh endif AS_OBJS_LIBC_FLAGS = -D__ASSEMBLY__ @@ -243,7 +243,7 @@ LITEOS_COPTS_BASE += $(LITEOS_COMMON_OPTS) # Anonymous structs and unions are supported on c11; while gcc supports those features as extension # which is turn on for default. As for Clang, if choose c99, -std=gnu99 should be used. -ifeq ($(LOSCFG_COMPILER_CLANG), y) +ifeq ($(LOSCFG_COMPILER_CLANG)$(LOSCFG_COMPILER_XTENSA_L106), y) LITEOS_COPTS_BASE += -std=gnu99 else LITEOS_COPTS_BASE += -std=c99 diff --git a/demos/kernel/api/los_api_dynamic_mem.c b/demos/kernel/api/los_api_dynamic_mem.c index ec5de843d8278242001d35c53909f3d2dc617add..20ebe2743e01d9c85eb42c38c84eec2a0c42a43d 100644 --- a/demos/kernel/api/los_api_dynamic_mem.c +++ b/demos/kernel/api/los_api_dynamic_mem.c @@ -38,7 +38,7 @@ extern "C" { #if defined (LOSCFG_ARCH_CORTEX_A53_AARCH32) || defined (LOSCFG_ARCH_CORTEX_A7) || \ defined (LOSCFG_ARCH_CORTEX_A53) || defined (LOSCFG_ARCH_CORTEX_A72) || \ - defined (LOSCFG_ARCH_CORTEX_A53_AARCH32) || defined (LOSCFG_ARCH_XTENSA_LX6) + defined (LOSCFG_ARCH_CORTEX_A53_AARCH32) || defined (LOSCFG_ARCH_XTENSA_LX6) || defined (LOSCFG_ARCH_XTENSA_L106) #define MEM_DYN_SIZE 2048 #endif #ifdef LOSCFG_ARCH_CORTEX_A9 diff --git a/demos/kernel/api/los_api_interrupt.c b/demos/kernel/api/los_api_interrupt.c index a5a2cdf59c3433eaf437601279eafc1bde32a37e..1d509b9ef0feb9aa1eb3d673607db9fbd874809f 100644 --- a/demos/kernel/api/los_api_interrupt.c +++ b/demos/kernel/api/los_api_interrupt.c @@ -45,7 +45,7 @@ extern "C" { #define SOFT_IRQ_NUM 3 #elif defined (LOSCFG_FAMILY_RASPBERRY) #define SOFT_IRQ_NUM RASPBERRY_IRQ -#elif defined (LOSCFG_PLATFORM_ESP32) || (LOSCFG_PLATFORM_ESP32_QEMU) +#elif defined (LOSCFG_PLATFORM_ESP32) || (LOSCFG_PLATFORM_ESP8266) || (LOSCFG_PLATFORM_ESP32_QEMU) #define SOFT_IRQ_NUM 7 #else #define SOFT_IRQ_NUM 39 diff --git a/drivers/interrupt/arm_control.c b/drivers/interrupt/arm_control.c index e240e6258498c2d82ff2ef6dddaa0d3a75672f8a..72a8aba167962a2498032ed79db8631b10b67165 100644 --- a/drivers/interrupt/arm_control.c +++ b/drivers/interrupt/arm_control.c @@ -61,12 +61,12 @@ LITE_OS_SEC_TEXT_MINOR VOID IrqEntryArmControl(VOID) return; } - HalIrqClear(hwiIndex); + ArchIrqClear(hwiIndex); OsIntHandle(hwiIndex, &g_hwiForm[hwiIndex]); return; } -UINT32 HalIrqUnmask(UINT32 hwiNum) +UINT32 ArchIrqUnmask(UINT32 hwiNum) { INTERRUPTS_INFO *irq = IRQ_REG_BASE; MAILBOXES_INFO *coreirq = CORE_MAILBOX_REG_BASE; @@ -89,7 +89,7 @@ UINT32 HalIrqUnmask(UINT32 hwiNum) return LOS_OK; } -UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqMask(HWI_HANDLE_T hwiNum) { INTERRUPTS_INFO *irq = IRQ_REG_BASE; MAILBOXES_INFO *coreirq = CORE_MAILBOX_REG_BASE; @@ -144,7 +144,7 @@ UINT32 HalCurIrqGet(VOID) return irqNum; } -UINT32 HalIrqClear(UINT32 hwiNum) +UINT32 ArchIrqClear(UINT32 hwiNum) { UINT32 currCpuid = ArchCurrCpuid(); ARMTIMER_INFO *timer = ARMTIMER_REG_BASE; @@ -164,7 +164,7 @@ UINT32 HalIrqClear(UINT32 hwiNum) return LOS_OK; } -UINT32 HalIrqPending(UINT32 hwiNum) +UINT32 ArchIrqPending(UINT32 hwiNum) { UINT32 intSave; UINT32 currCpuid = ArchCurrCpuid(); @@ -187,7 +187,7 @@ CHAR *HalIrqVersion(VOID) return "arm control"; } -HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -213,14 +213,14 @@ UINT32 HalIrqSendIpi(UINT32 target, UINT32 ipi) #endif STATIC const HwiControllerOps g_armControlOps = { - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, .getCurIrqNum = HalCurIrqGet, .getIrqVersion = HalIrqVersion, - .getHandleForm = HalIrqGetHandleForm, + .getHandleForm = ArchIrqGetHandleForm, .handleIrq = IrqEntryArmControl, - .clearIrq = HalIrqClear, - .triggerIrq = HalIrqPending, + .clearIrq = ArchIrqClear, + .triggerIrq = ArchIrqPending, #ifdef LOSCFG_KERNEL_SMP .sendIpi = HalIrqSendIpi, .setIrqCpuAffinity = NULL, @@ -272,7 +272,7 @@ VOID HalIrqInitPercpu(VOID) #endif } -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { HalIrqInitPercpu(); /* register interrupt controller's operations */ diff --git a/drivers/interrupt/arm_gic_v2.c b/drivers/interrupt/arm_gic_v2.c index 582d7789885f90acc285d9540ba8ea9fdb6ba88c..3665a052fcda3b013f8fec488fbfc7859e363386 100644 --- a/drivers/interrupt/arm_gic_v2.c +++ b/drivers/interrupt/arm_gic_v2.c @@ -80,7 +80,7 @@ UINT32 HalCurIrqGet(VOID) return g_curIrqNum; } -UINT32 HalIrqMask(UINT32 vector) +UINT32 ArchIrqMask(UINT32 vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -90,7 +90,7 @@ UINT32 HalIrqMask(UINT32 vector) return LOS_OK; } -UINT32 HalIrqUnmask(UINT32 vector) +UINT32 ArchIrqUnmask(UINT32 vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -100,7 +100,7 @@ UINT32 HalIrqUnmask(UINT32 vector) return LOS_OK; } -UINT32 HalIrqPending(UINT32 vector) +UINT32 ArchIrqPending(UINT32 vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -110,7 +110,7 @@ UINT32 HalIrqPending(UINT32 vector) return LOS_OK; } -UINT32 HalIrqClear(UINT32 vector) +UINT32 ArchIrqClear(UINT32 vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -155,7 +155,7 @@ CHAR *HalIrqVersion(VOID) return irqVerString; } -HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -184,14 +184,14 @@ UINT32 StubSetIrqPriority(HWI_HANDLE_T hwiNum, UINT8 priority) } STATIC const HwiControllerOps g_gicv2Ops = { - .triggerIrq = HalIrqPending, - .clearIrq = HalIrqClear, - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, + .triggerIrq = ArchIrqPending, + .clearIrq = ArchIrqClear, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, .setIrqPriority = StubSetIrqPriority, .getCurIrqNum = HalCurIrqGet, .getIrqVersion = HalIrqVersion, - .getHandleForm = HalIrqGetHandleForm, + .getHandleForm = ArchIrqGetHandleForm, .handleIrq = HalIrqHandler, #ifdef LOSCFG_KERNEL_SMP .sendIpi = HalIrqSendIpi, @@ -228,7 +228,7 @@ UINT32 HalSmpIrqInit(VOID) } #endif -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { UINT32 i; diff --git a/drivers/interrupt/arm_gic_v3.c b/drivers/interrupt/arm_gic_v3.c index a86f51bcfa4c5f5067793c859826fbac6507dd0d..da8dc275fa47eb7d0676f5536c41979a7c7c6e89 100644 --- a/drivers/interrupt/arm_gic_v3.c +++ b/drivers/interrupt/arm_gic_v3.c @@ -259,7 +259,7 @@ UINT32 HalCurIrqGet(VOID) return g_curIrqNum; } -UINT32 HalIrqMask(UINT32 vector) +UINT32 ArchIrqMask(UINT32 vector) { INT32 i; const UINT32 mask = 1U << (vector % 32); @@ -280,7 +280,7 @@ UINT32 HalIrqMask(UINT32 vector) return LOS_OK; } -UINT32 HalIrqUnmask(UINT32 vector) +UINT32 ArchIrqUnmask(UINT32 vector) { INT32 i; const UINT32 mask = 1U << (vector % 32); @@ -302,7 +302,7 @@ UINT32 HalIrqUnmask(UINT32 vector) return LOS_OK; } -UINT32 HalIrqPending(UINT32 vector) +UINT32 ArchIrqPending(UINT32 vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -312,7 +312,7 @@ UINT32 HalIrqPending(UINT32 vector) return LOS_OK; } -UINT32 HalIrqClear(UINT32 vector) +UINT32 ArchIrqClear(UINT32 vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -347,7 +347,7 @@ UINT32 HalIrqSetPrio(UINT32 vector, UINT8 priority) return LOS_OK; } -HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -418,20 +418,20 @@ VOID HalIrqInitPercpu(VOID) #ifdef LOSCFG_KERNEL_SMP /* unmask ipi interrupts */ - (void)HalIrqUnmask(LOS_MP_IPI_WAKEUP); - (void)HalIrqUnmask(LOS_MP_IPI_HALT); + (void)ArchIrqUnmask(LOS_MP_IPI_WAKEUP); + (void)ArchIrqUnmask(LOS_MP_IPI_HALT); #endif } STATIC const HwiControllerOps g_gicv3Ops = { - .triggerIrq = HalIrqPending, - .clearIrq = HalIrqClear, - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, + .triggerIrq = ArchIrqPending, + .clearIrq = ArchIrqClear, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, .setIrqPriority = HalIrqSetPrio, .getCurIrqNum = HalCurIrqGet, .getIrqVersion = HalIrqVersion, - .getHandleForm = HalIrqGetHandleForm, + .getHandleForm = ArchIrqGetHandleForm, .handleIrq = HalIrqHandler, #ifdef LOSCFG_KERNEL_SMP .sendIpi = HalIrqSendIpi, @@ -468,7 +468,7 @@ UINT32 HalSmpIrqInit(VOID) } #endif -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { UINT32 i; UINT64 affinity; diff --git a/drivers/interrupt/arm_nvic.c b/drivers/interrupt/arm_nvic.c index 6e18b4253fb67654c4bcd1f654942d9b33f6e5fd..ba9af16e00616c6e2ca07301308c5d9f275d0dfd 100644 --- a/drivers/interrupt/arm_nvic.c +++ b/drivers/interrupt/arm_nvic.c @@ -79,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID IrqEntryV7M(VOID) } } -UINT32 HalIrqUnmask(UINT32 hwiNum) +UINT32 ArchIrqUnmask(UINT32 hwiNum) { UINT32 intSave; @@ -114,7 +114,7 @@ UINT32 HalIrqSetPriority(UINT32 hwiNum, UINT8 priority) return LOS_OK; } -UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqMask(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -129,7 +129,7 @@ UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) return LOS_OK; } -UINT32 HalIrqPending(UINT32 hwiNum) +UINT32 ArchIrqPending(UINT32 hwiNum) { UINT32 intSave; @@ -144,7 +144,7 @@ UINT32 HalIrqPending(UINT32 hwiNum) return LOS_OK; } -UINT32 HalIrqClear(UINT32 hwiNum) +UINT32 ArchIrqClear(UINT32 hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -166,7 +166,7 @@ CHAR *HalIrqVersion(VOID) return "NVIC"; } -HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -176,17 +176,17 @@ HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) } STATIC const HwiControllerOps g_nvicOps = { - .triggerIrq = HalIrqPending, - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, + .triggerIrq = ArchIrqPending, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, .setIrqPriority = HalIrqSetPriority, .getCurIrqNum = HalCurIrqGet, .getIrqVersion = HalIrqVersion, - .getHandleForm = HalIrqGetHandleForm, - .clearIrq = HalIrqClear, + .getHandleForm = ArchIrqGetHandleForm, + .clearIrq = ArchIrqClear, }; -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { UINT32 i; diff --git a/drivers/interrupt/csky_vic.c b/drivers/interrupt/csky_vic.c index a2f0a1128e5ba25a32b246c053117d9d4784e2a8..2d1cd94c7c70c376219ca9cb6f80fc444f6ccf9b 100644 --- a/drivers/interrupt/csky_vic.c +++ b/drivers/interrupt/csky_vic.c @@ -68,7 +68,7 @@ VOID IrqEntryCsky(VOID) } } -UINT32 HalIrqUnmask(UINT32 hwiNum) +UINT32 ArchIrqUnmask(UINT32 hwiNum) { UINT32 intSave; @@ -105,7 +105,7 @@ UINT32 HalIrqSetPriority(UINT32 hwiNum, UINT8 priority) return LOS_OK; } -UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqMask(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -119,7 +119,7 @@ UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) return LOS_OK; } -UINT32 HalIrqPending(UINT32 hwiNum) +UINT32 ArchIrqPending(UINT32 hwiNum) { UINT32 intSave; @@ -133,7 +133,7 @@ UINT32 HalIrqPending(UINT32 hwiNum) return LOS_OK; } -UINT32 HalIrqClear(UINT32 hwiNum) +UINT32 ArchIrqClear(UINT32 hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -153,7 +153,7 @@ CHAR *HalIrqVersion(VOID) return "VIC"; } -HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -163,17 +163,17 @@ HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) } STATIC const HwiControllerOps g_nvicOps = { - .triggerIrq = HalIrqPending, - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, + .triggerIrq = ArchIrqPending, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, .setIrqPriority = HalIrqSetPriority, .getCurIrqNum = HalCurIrqGet, .getIrqVersion = HalIrqVersion, - .getHandleForm = HalIrqGetHandleForm, - .clearIrq = HalIrqClear, + .getHandleForm = ArchIrqGetHandleForm, + .clearIrq = ArchIrqClear, }; -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { UINT32 i; diff --git a/drivers/interrupt/include/hal_hwi.h b/drivers/interrupt/include/hal_hwi.h index 9abe79c5dcbd83e8ba254d5a0b7b8b1e2059a49f..bb0c4a37da79080eff41daf1434e7670de591af7 100644 --- a/drivers/interrupt/include/hal_hwi.h +++ b/drivers/interrupt/include/hal_hwi.h @@ -51,12 +51,12 @@ extern "C" { #define HWI_NUM_VALID(num) (((num) >= OS_USER_HWI_MIN) && ((num) <= OS_USER_HWI_MAX)) -extern VOID HalIrqInit(VOID); +extern VOID ArchIrqInit(VOID); extern VOID HalIrqInitPercpu(VOID); -extern UINT32 HalIrqMask(UINT32 vector); -extern UINT32 HalIrqUnmask(UINT32 vector); -extern UINT32 HalIrqPending(UINT32 vector); -extern UINT32 HalIrqClear(UINT32 vector); +extern UINT32 ArchIrqMask(UINT32 vector); +extern UINT32 ArchIrqUnmask(UINT32 vector); +extern UINT32 ArchIrqPending(UINT32 vector); +extern UINT32 ArchIrqClear(UINT32 vector); extern CHAR *HalIrqVersion(VOID); extern UINT32 HalCurIrqGet(VOID); extern UINT32 HalIrqSetPrio(UINT32 vector, UINT8 priority); diff --git a/drivers/interrupt/include/xtensa_lx6.h b/drivers/interrupt/include/xtensa_lx6.h index 8f0b4861aebaa80bda7007d9e502eb94e0dd5102..50231d027c973ee82393dc4468e61c1b8e91f1cc 100644 --- a/drivers/interrupt/include/xtensa_lx6.h +++ b/drivers/interrupt/include/xtensa_lx6.h @@ -38,9 +38,9 @@ extern "C" { #endif /* __cplusplus */ /* hardware interrupt entry */ -VOID HalInterrupt(VOID); -VOID HalIrqInit(VOID); -UINT32 HalIntNumGet(VOID); +VOID ArchInterrupt(VOID); +VOID ArchIrqInit(VOID); +UINT32 ArchCurIrqGet(VOID); #ifdef __cplusplus #if __cplusplus diff --git a/drivers/interrupt/riscv_eclic.c b/drivers/interrupt/riscv_eclic.c index eebd5d01ba0af98a4ee4de1b392bfa73b2867b44..fd80a0a95d7634e719a945b5700c52d4bf739590 100644 --- a/drivers/interrupt/riscv_eclic.c +++ b/drivers/interrupt/riscv_eclic.c @@ -183,7 +183,7 @@ STATIC const HwiControllerOps g_eclicOps = { .getHandleForm = EclicIrqGetHandleForm, }; -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { UINT32 i; diff --git a/drivers/interrupt/riscv_plic.c b/drivers/interrupt/riscv_plic.c index d67a7150d8f9cb2436149b3e9517270e80cf82aa..69e46e868a02d4cb479a2c5ace8d8730263b3c71 100644 --- a/drivers/interrupt/riscv_plic.c +++ b/drivers/interrupt/riscv_plic.c @@ -207,7 +207,7 @@ STATIC const HwiControllerOps g_plicOps = { .getHandleForm = PlicIrqGetHandleForm, }; -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { UINT32 i; diff --git a/drivers/interrupt/xtensa_lx6.c b/drivers/interrupt/xtensa_lx6.c index 3935abcdf9f49cf939a6a97fd0217783bd3e7272..015eff64662210b9fab2742ab162830ea7a0b1f4 100644 --- a/drivers/interrupt/xtensa_lx6.c +++ b/drivers/interrupt/xtensa_lx6.c @@ -41,7 +41,7 @@ extern "C" { LITE_OS_SEC_BSS HwiHandleInfo g_hwiForm[LOSCFG_PLATFORM_HWI_LIMIT]; extern VOID HalUpdateTimerCmpVal(VOID); -UINT32 HalIrqPending(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqPending(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -52,7 +52,7 @@ UINT32 HalIrqPending(HWI_HANDLE_T hwiNum) return LOS_OK; } -UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqUnmask(HWI_HANDLE_T hwiNum) { UINT32 ier; @@ -66,7 +66,7 @@ UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum) return LOS_OK; } -UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqMask(HWI_HANDLE_T hwiNum) { UINT32 ier; @@ -80,12 +80,12 @@ UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) return LOS_OK; } -VOID HalInterrupt(VOID) +__attribute__((section(".iram1"))) VOID ArchInterrupt(VOID) { UINT32 hwiIndex; - hwiIndex = HalIntNumGet(); - HalIrqClear(hwiIndex); + hwiIndex = ArchCurIrqGet(); + ArchIrqClear(hwiIndex); OsIntHandle(hwiIndex, &g_hwiForm[hwiIndex]); if (hwiIndex == HWI_NUM_SIX) { HalUpdateTimerCmpVal(); @@ -95,7 +95,7 @@ VOID HalInterrupt(VOID) } } -UINT32 HalIrqClear(HWI_HANDLE_T vector) +UINT32 ArchIrqClear(HWI_HANDLE_T vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -105,7 +105,7 @@ UINT32 HalIrqClear(HWI_HANDLE_T vector) return LOS_OK; } -UINT32 HalIntNumGet(VOID) +UINT32 ArchCurIrqGet(VOID) { UINT32 ier; UINT32 intenable; @@ -119,7 +119,7 @@ UINT32 HalIntNumGet(VOID) return __builtin_ffs(intSave) - 1; } -STATIC HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +STATIC HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -129,17 +129,17 @@ STATIC HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) } STATIC const HwiControllerOps g_lx6Ops = { - .triggerIrq = HalIrqPending, - .clearIrq = HalIrqClear, - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, - .getHandleForm = HalIrqGetHandleForm, + .triggerIrq = ArchIrqPending, + .clearIrq = ArchIrqClear, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, + .getHandleForm = ArchIrqGetHandleForm, }; -VOID HalIrqInit(VOID) +VOID ArchIrqInit(VOID) { for (UINT32 i = 0; i < OS_HWI_MAX_NUM; i++) { - HalIrqMask(i); + ArchIrqMask(i); } asm volatile ("wsr %0, vecbase" : : "r"(INIT_VECTOR_START)); OsHwiControllerReg(&g_lx6Ops); diff --git a/drivers/interrupt/xtensa_xea2.c b/drivers/interrupt/xtensa_xea2.c index 5e6f3277b904215df2df93ce4e47c7e3c3d38ba7..8f7501be319355edcafc9d91e9eb7f4946dededb 100644 --- a/drivers/interrupt/xtensa_xea2.c +++ b/drivers/interrupt/xtensa_xea2.c @@ -36,7 +36,7 @@ extern "C" { LITE_OS_SEC_BSS HwiHandleInfo g_hwiForm[LOSCFG_PLATFORM_HWI_LIMIT]; -UINT32 HalIrqPending(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqPending(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -47,7 +47,7 @@ UINT32 HalIrqPending(HWI_HANDLE_T hwiNum) return LOS_OK; } -UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqUnmask(HWI_HANDLE_T hwiNum) { UINT32 ier; @@ -61,7 +61,7 @@ UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum) return LOS_OK; } -UINT32 HalIrqMask(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqMask(HWI_HANDLE_T hwiNum) { UINT32 ier; @@ -84,7 +84,7 @@ WEAK VOID IrqEntryXea2(UINT32 intrNo) OsIntHandle(intrNo, &g_hwiForm[intrNo]); } -UINT32 HalIrqClear(HWI_HANDLE_T vector) +UINT32 ArchIrqClear(HWI_HANDLE_T vector) { if (!HWI_NUM_VALID(vector)) { return LOS_ERRNO_HWI_NUM_INVALID; @@ -95,7 +95,7 @@ UINT32 HalIrqClear(HWI_HANDLE_T vector) return LOS_OK; } -STATIC HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +STATIC HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -105,14 +105,14 @@ STATIC HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) } STATIC const HwiControllerOps g_xea2Ops = { - .triggerIrq = HalIrqPending, - .clearIrq = HalIrqClear, - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, - .getHandleForm = HalIrqGetHandleForm, + .triggerIrq = ArchIrqPending, + .clearIrq = ArchIrqClear, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, + .getHandleForm = ArchIrqGetHandleForm, }; -LITE_OS_SEC_TEXT_INIT VOID HalIrqInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchIrqInit(VOID) { /* register interrupt controller's operations */ OsHwiControllerReg(&g_xea2Ops); diff --git a/drivers/interrupt/xtensa_xea3.c b/drivers/interrupt/xtensa_xea3.c index eb3efb6aa850894b2cf44926400463e77df7e62c..80d120912be127a763fac5f89d508e7cf6ff8666 100644 --- a/drivers/interrupt/xtensa_xea3.c +++ b/drivers/interrupt/xtensa_xea3.c @@ -77,7 +77,7 @@ LITE_OS_SEC_TEXT_INIT VOID IrqEntryXea3(HWI_ARG_T arg) OsIntHandle(hwiIndex, &g_hwiForm[hwiIndex]); } -UINT32 HalIrqPending(HWI_HANDLE_T irq) +UINT32 ArchIrqPending(HWI_HANDLE_T irq) { UINTPTR uvIntSave; @@ -91,7 +91,7 @@ UINT32 HalIrqPending(HWI_HANDLE_T irq) return LOS_OK; } -UINT32 HalIrqUnmask(HWI_HANDLE_T irq) +UINT32 ArchIrqUnmask(HWI_HANDLE_T irq) { UINTPTR uvIntSave; @@ -105,7 +105,7 @@ UINT32 HalIrqUnmask(HWI_HANDLE_T irq) return LOS_OK; } -UINT32 HalIrqMask(HWI_HANDLE_T irq) +UINT32 ArchIrqMask(HWI_HANDLE_T irq) { UINTPTR uvIntSave; @@ -124,7 +124,7 @@ UINT32 HalCurIrqGet(VOID) return g_curIrqNum; } -UINT32 HalIrqClear(HWI_HANDLE_T hwiNum) +UINT32 ArchIrqClear(HWI_HANDLE_T hwiNum) { UINTPTR uvIntSave; @@ -139,7 +139,7 @@ UINT32 HalIrqClear(HWI_HANDLE_T hwiNum) return LOS_OK; } -STATIC HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) +STATIC HwiHandleInfo *ArchIrqGetHandleForm(HWI_HANDLE_T hwiNum) { if (!HWI_NUM_VALID(hwiNum)) { return NULL; @@ -149,15 +149,15 @@ STATIC HwiHandleInfo *HalIrqGetHandleForm(HWI_HANDLE_T hwiNum) } STATIC const HwiControllerOps g_xea3Ops = { - .triggerIrq = HalIrqPending, - .clearIrq = HalIrqClear, - .enableIrq = HalIrqUnmask, - .disableIrq = HalIrqMask, + .triggerIrq = ArchIrqPending, + .clearIrq = ArchIrqClear, + .enableIrq = ArchIrqUnmask, + .disableIrq = ArchIrqMask, .getCurIrqNum = HalCurIrqGet, - .getHandleForm = HalIrqGetHandleForm, + .getHandleForm = ArchIrqGetHandleForm, }; -LITE_OS_SEC_TEXT_INIT VOID HalIrqInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchIrqInit(VOID) { UINT32 i; diff --git a/drivers/timer/arm_generic_timer.c b/drivers/timer/arm_generic_timer.c index 46ba2410ebe3d93f92181a5893485f55739ad112..d7da8431856147fea7800d2415f17e136f9d9af5 100644 --- a/drivers/timer/arm_generic_timer.c +++ b/drivers/timer/arm_generic_timer.c @@ -158,7 +158,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalClockInit(VOID) LITE_OS_SEC_TEXT_INIT VOID HalClockStart(VOID) { - (void)HalIrqUnmask(OS_TICK_INT_NUM); + (void)ArchIrqUnmask(OS_TICK_INT_NUM); /* triggle the first tick */ TimerCtlWrite(0); @@ -191,14 +191,14 @@ UINT32 HalClockGetTickTimerCycles(VOID) VOID HalClockTickTimerReload(UINT32 cycles) { - (void)HalIrqMask(OS_TICK_INT_NUM); - (void)HalIrqClear(OS_TICK_INT_NUM); + (void)ArchIrqMask(OS_TICK_INT_NUM); + (void)ArchIrqClear(OS_TICK_INT_NUM); TimerCtlWrite(0); TimerCvalWrite(HalClockGetCycles() + cycles); TimerCtlWrite(1); - (void)HalIrqUnmask(OS_TICK_INT_NUM); + (void)ArchIrqUnmask(OS_TICK_INT_NUM); } UINT32 HalGetRemainingCycles(UINT32 *ticks) diff --git a/drivers/timer/arm_private_timer.c b/drivers/timer/arm_private_timer.c index e713a74962853b598a39cfe137bf66bf644fe476..fea8416c6f2cc22509020deafd0e4929f439ef49 100644 --- a/drivers/timer/arm_private_timer.c +++ b/drivers/timer/arm_private_timer.c @@ -64,7 +64,7 @@ VOID HalClockFreqWrite(UINT32 freq) VOID HalClockStart(VOID) { - (void)HalIrqUnmask(PRVTIMER_INT_NUM); + (void)ArchIrqUnmask(PRVTIMER_INT_NUM); g_privateTimer->load = OS_CYCLE_PER_TICK; g_privateTimer->control = 0x06; /* IAE bits = 110, not enabled yet */ @@ -121,7 +121,7 @@ UINT32 HalClockGetTickTimerCycles(VOID) VOID HalClockTickTimerReload(UINT32 cycles) { - (void)HalIrqUnmask(PRVTIMER_INT_NUM); + (void)ArchIrqUnmask(PRVTIMER_INT_NUM); /* set control counter regs to defaults */ g_privateTimer->load = cycles; diff --git a/drivers/timer/arm_sp804_timer.c b/drivers/timer/arm_sp804_timer.c index a843fd10b5ed60759df27e8ca2a1f18ff4b472e4..0befe580d3c0dc84c40cb1a4c72c58e6914fd468 100644 --- a/drivers/timer/arm_sp804_timer.c +++ b/drivers/timer/arm_sp804_timer.c @@ -78,7 +78,7 @@ VOID HalClockTickTimerReload(UINT32 cycles) /* int clear */ WRITE_UINT32(1, TIMER_TICK_REG_BASE + TIMER_INT_CLR); dsb(); /* Make sure pending bit of int source clear */ - (void)HalIrqClear(NUM_HAL_INTERRUPT_TIMER); + (void)ArchIrqClear(NUM_HAL_INTERRUPT_TIMER); } VOID ResetTimerMasked(VOID) @@ -340,7 +340,7 @@ LITE_OS_SEC_TEXT VOID HalTickEntry(VOID) dsb(); /* Make sure pending bit of int source clear for riscv SoC */ #endif #ifdef LOSCFG_PLATFORM_BSP_RISCV_PLIC - (void)HalIrqClear(NUM_HAL_INTERRUPT_TIMER); + (void)ArchIrqClear(NUM_HAL_INTERRUPT_TIMER); #endif OsTickHandler(); @@ -414,7 +414,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalClockStart(VOID) WRITE_UINT32(temp, TIMER_TICK_REG_BASE + TIMER_CONTROL); /* clock start */ - (void)HalIrqUnmask(NUM_HAL_INTERRUPT_TIMER); + (void)ArchIrqUnmask(NUM_HAL_INTERRUPT_TIMER); HalClockEnable(); /* start adjusting swtmer */ diff --git a/drivers/timer/xtensa_lx6_timer.c b/drivers/timer/xtensa_lx6_timer.c index 082b5215b27d3c8ad1d90033dee3880825fc2415..6496a2642e47cdc80a6c88c581ef295b11b44914 100644 --- a/drivers/timer/xtensa_lx6_timer.c +++ b/drivers/timer/xtensa_lx6_timer.c @@ -132,14 +132,15 @@ VOID HalClockStart(VOID) g_cyclesPerTick = OS_CYCLE_PER_TICK; SetCcompare(g_cyclesPerTick); ResetCcount(); +#ifdef LOSCFG_COMPILER_XTENSA_LX6 __asm__ __volatile__("wsr %0, ccompare1; rsync" : : "a"(0)); __asm__ __volatile__("wsr %0, ccompare2; rsync" : : "a"(0)); - +#endif UINT32 ret = LOS_HwiEnable(OS_TICK_INT_NUM); if (ret != 0) { PRINTK("LOS_HwiEnable failed. ret = %#x\n", ret); } - (VOID)HalIrqUnmask(OS_TICK_INT_NUM); + (VOID)ArchIrqUnmask(OS_TICK_INT_NUM); } UINT64 HalClockGetCycles(VOID) diff --git a/drivers/timer/xtensa_xea2_timer.c b/drivers/timer/xtensa_xea2_timer.c index 4f1ce87dab460512d8a217a326115d2853ea8600..42860e530c667e9cceb9a945c7f6cb70012e1b84 100644 --- a/drivers/timer/xtensa_xea2_timer.c +++ b/drivers/timer/xtensa_xea2_timer.c @@ -126,7 +126,7 @@ VOID HalClockStart(VOID) __asm__ __volatile__("rsr %0, ccount" : "=a"(ccount) :); OS_HWTMR_ADJUST_CCOMPARE(OS_TICK_INT_NUM, (ccount + g_cyclesPerTick)); - (VOID)HalIrqUnmask(OS_TICK_INT_NUM); + (VOID)ArchIrqUnmask(OS_TICK_INT_NUM); } VOID HalDelayUs(UINT32 usecs) diff --git a/drivers/uart/src/arm_pl011/arm_pl011.c b/drivers/uart/src/arm_pl011/arm_pl011.c index d89e19840e7fa6683903549bad2e457c15ea413e..8cf709d04936fbbbe77ba67816e0490e244b2de0 100644 --- a/drivers/uart/src/arm_pl011/arm_pl011.c +++ b/drivers/uart/src/arm_pl011/arm_pl011.c @@ -209,7 +209,7 @@ INT32 uart_hwiCreate(VOID) /* enable receive */ UARTREG(UART_REG_BASE, UART_CR) |= (1 << 9); - HalIrqUnmask(NUM_HAL_INTERRUPT_UART); + ArchIrqUnmask(NUM_HAL_INTERRUPT_UART); } return ret; } diff --git a/kernel/base/los_hwi.c b/kernel/base/los_hwi.c index 5e7fc168bb4c0b15ede1fe6804811913e73e3980..0adc4f4d5f9111fb2b7dac909018ca4b3136cf01 100644 --- a/kernel/base/los_hwi.c +++ b/kernel/base/los_hwi.c @@ -499,7 +499,7 @@ LITE_OS_SEC_TEXT_MINOR VOID LOS_IntWakeupHookReg(WAKEUPFROMINTHOOK hook) /* Initialization of the hardware interrupt */ LITE_OS_SEC_TEXT_INIT VOID OsHwiInit(VOID) { - HalIrqInit(); + ArchIrqInit(); return; } diff --git a/kernel/extended/lowpower/runstop/src/los_runstop.c b/kernel/extended/lowpower/runstop/src/los_runstop.c index 78ee424dc81f954a5fbd1b40c4cc9eefc0b24a90..0da74e3736444c2eee75f1fd391f25771842fc27 100644 --- a/kernel/extended/lowpower/runstop/src/los_runstop.c +++ b/kernel/extended/lowpower/runstop/src/los_runstop.c @@ -258,7 +258,7 @@ LITE_OS_SEC_TEXT_MINOR VOID OsSystemWakeup(VOID) (VOID)memset_s((VOID *)&__bss_start, (((UINTPTR)&__bss_end) - ((UINTPTR)&__bss_start)), 0, (((UINTPTR)&__bss_end) - ((UINTPTR)&__bss_start))); - HalIrqInit(); + ArchIrqInit(); #ifndef LOSCFG_PLATFORM_NO_UART uart_early_init(); diff --git a/lib/Kconfig b/lib/Kconfig index 94d8f5a0d79b05e6ff7a7dfe68b9d37c9e005cef..59b7912cba3f487f5b65eec7fad7303190c57367 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -1,5 +1,5 @@ menu "Lib" - depends on !LOSCFG_ARCH_XTENSA || LOSCFG_ARCH_XTENSA_LX6 + depends on !LOSCFG_ARCH_XTENSA || LOSCFG_ARCH_XTENSA_LX6 || LOSCFG_ARCH_XTENSA_L106 config LOSCFG_LIB_LIBC bool "Enable Libc" diff --git a/lib/huawei_libc/stdio/getchar_uart.c b/lib/huawei_libc/stdio/getchar_uart.c index 0103a2a6ee37c19b908c6946ac3d859a78f4bd4f..b6fa894bf95bd0a126099be72d3efd9dadbfaa1a 100644 --- a/lib/huawei_libc/stdio/getchar_uart.c +++ b/lib/huawei_libc/stdio/getchar_uart.c @@ -41,11 +41,11 @@ int do_uart_getc(void) static int num = 0; static int pos = 0; char ch; - (void)HalIrqMask(NUM_HAL_INTERRUPT_UART); + (void)ArchIrqMask(NUM_HAL_INTERRUPT_UART); if (buf == NULL) { buf = (char *)malloc(INPUT_BUF_SIZE); if (buf == NULL) { - (void)HalIrqUnmask(NUM_HAL_INTERRUPT_UART); + (void)ArchIrqUnmask(NUM_HAL_INTERRUPT_UART); return EOF; } pos = 0; @@ -72,7 +72,8 @@ int do_uart_getc(void) num--; ret = buf[pos++]; - (void)HalIrqUnmask(NUM_HAL_INTERRUPT_UART); + (void)ArchIrqUnmask(NUM_HAL_INTERRUPT_UART); return ret; } -#endif \ No newline at end of file +#endif + diff --git a/targets/ESP32/Inc/main.h b/targets/ESP32/Inc/main.h index a942440eaec765535d23bea2849582e067c64f74..796dd698c92ef47a993ad5a72cb70b3037d82792 100644 --- a/targets/ESP32/Inc/main.h +++ b/targets/ESP32/Inc/main.h @@ -45,7 +45,7 @@ extern "C" { #define TIMER_GROUP1 0x3ff60000 #define WDT_TIMER_GROUP1_CNTL 0x3ff60048 #define REG32_READ(reg) (*(volatile UINT32*) (reg)) -#define REG32_WRITE(reg, value) (*(volatile UINT32*) (reg) = value) +#define REG32_WRITE(reg, value) (*(volatile UINT32*) (reg) = (value)) #define RTC_CNTL_WDT_FEED_BIT (31) #define RTC_CNTL_WDT_FLASHBOOT_MOD_EN (10) diff --git a/targets/ESP8266/Inc/main.h b/targets/ESP8266/Inc/main.h new file mode 100644 index 0000000000000000000000000000000000000000..7783a3888de5b09c4ebb3b64ef48211933bc4603 --- /dev/null +++ b/targets/ESP8266/Inc/main.h @@ -0,0 +1,46 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Main HeadFile + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _MAIN_H +#define _MAIN_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +extern char __bss_start, __bss_end; + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _MAIN_H */ diff --git a/targets/ESP8266/Inc/usart.h b/targets/ESP8266/Inc/usart.h new file mode 100644 index 0000000000000000000000000000000000000000..d6ee2ff841c723cb5aa95582161d5680a0d1fe55 --- /dev/null +++ b/targets/ESP8266/Inc/usart.h @@ -0,0 +1,67 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Usart HeadFile + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include "los_typedef.h" +#include "uart.h" + +#ifndef _USART_H +#define _USART_H + +#define REG32_READ(reg) (*(volatile UINT32*) (reg)) +#define REG32_WRITE(reg, value) (*(volatile UINT32*) (reg) = value) +#define REG32_MASK_CLEAR(reg, mask) (REG32_WRITE(reg, REG32_READ(reg) & (~(mask)))) +#define REG32_MASK_SET(reg, mask) (REG32_WRITE(reg, REG32_READ(reg) | (mask))) +#define FUN_WPU_BIT (0x1 << 7) +#define IO_MUX_BASE (0x60000800) +#define IO_MUX_UART0_TX_REG (IO_MUX_BASE + 0x18) +#define IO_MUX_UART0_RX_REG (IO_MUX_BASE + 0x14) +#define IO_MUX_FUNC_MASK (0x13 << 4) +#define UART_BAUDRATE_DEFAULT (115200) +#define UART_8BITS_DATA (0x3) +#define UART_FIFO_BUFFER (128) + +#define IO_MUX_FUNCTION0 (0) +#define IO_MUX_FUNCTION1 (1) +#define IO_MUX_FUNCTION2 (2) +#define IO_MUX_FUNCTION3 (3) +#define IO_MUX_FUNCTION4 (4) +#define IO_MUX_FUNCTION5 (5) + +#define UART_REG_BASE (0x60000000) +#define UART_STATUS_REG (UART_REG_BASE + 0x1C) +#define TXFIFO_CNT_MASK (0xFF) +#define TXFIFP_CNT_SHIFT (16) +#define UART_FIFO_REG (UART_REG_BASE + 0) +#define UART_INTENA_REG (UART_REG_BASE + 0xC) +#define UART_INTCLR_REG (UART_REG_BASE + 0x10) +#define RXFIFO_TOUT_INT_MASK (1 << 8) +#define RXFIFO_FULL_INT_MASK (1) + +extern UartControllerOps g_genericUart; + +#endif /* _USART_H */ diff --git a/targets/ESP8266/Makefile b/targets/ESP8266/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..cdd34d77466394956c8b819fd578e1e4b59f8aec --- /dev/null +++ b/targets/ESP8266/Makefile @@ -0,0 +1,33 @@ +include $(LITEOSTOPDIR)/config.mk + +MODULE_NAME := $(LITEOS_PLATFORM) + +LOCAL_SRCS := $(wildcard Src/*.c) + +ifeq ($(LOSCFG_PLATFORM_ADAPT), y) +LOCAL_SRCS += $(wildcard os_adapt/*.c) +endif + +ALL_ASSRCS := $(wildcard *.S) +ASSRCS := $(ALL_ASSRCS) + +# C defines +C_DEFS += \ + -D__LITEOS__ \ + -Wno-main + +LOCAL_SRCS += $(ASSRCS) + +LOCAL_INCLUDE += \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/include \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/include/hisoc \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/include/asm \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/Inc \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM) \ + -I $(LITEOSTOPDIR)/include + +BOARD_DEF += $(C_DEFS) + +LOCAL_FLAGS := $(BOARD_DEF) $(LOCAL_INCLUDE) $(LITEOS_GCOV_OPTS) + +include $(MODULE) diff --git a/targets/ESP8266/Src/main.c b/targets/ESP8266/Src/main.c new file mode 100644 index 0000000000000000000000000000000000000000..b21b13c75e65539042910fe51a3cc2451ca3ac58 --- /dev/null +++ b/targets/ESP8266/Src/main.c @@ -0,0 +1,102 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Main Process + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include "main.h" +#include "usart.h" +#include "los_task_pri.h" +#include "arch/canary.h" + +STATIC VOID BssClean(VOID) +{ + memset_s(&__bss_start, ((UINTPTR)&__bss_end - (UINTPTR)&__bss_start), 0, ((UINTPTR)&__bss_end - (UINTPTR)&__bss_start)); +} + +typedef struct { + UINT8 magic; + UINT8 segmentCount; + UINT8 spiMode; + UINT8 spiSpeed: 4; + UINT8 spiSize: 4; + UINT32 entryAddr; +} __attribute__((packed)) EspImageHead; + +typedef struct { + UINT32 loadAddr; + UINT32 dataLen; + UINT32 data[0]; +} EspImageSegmentHead; + +#define FLASH_BASE (0x40200000) +#define FLASH_SIZE (0x100000) +STATIC VOID AnalysisImage(UINT32 imageAddr) +{ + EspImageHead *imageHead = (EspImageHead *)(FLASH_BASE + (imageAddr & (FLASH_SIZE - 1))); + EspImageSegmentHead *segment = (EspImageSegmentHead *)((UINTPTR)imageHead + sizeof(EspImageHead)); + UINT8 segmentCount = ((*(volatile UINT32 *)imageHead) & 0xFF00) >> 8; /* only access for a word */ + for (INT32 i = 1; i < segmentCount; i++) { + segment = (EspImageSegmentHead *)((UINTPTR)segment + sizeof(EspImageSegmentHead) + segment->dataLen); + if ((segment->loadAddr >= FLASH_BASE) && (segment->loadAddr < (FLASH_BASE + FLASH_SIZE))) { + continue; + } + + UINT32 *dest = (UINT32 *)segment->loadAddr; + UINT32 *src = segment->data; + UINT32 size = segment->dataLen / sizeof(UINT32); + while (size--) { + *dest++ = *src++; + } + } +} + +INT32 main(UINT32 imageAddr) +{ + AnalysisImage(imageAddr); + __asm__ __volatile__("movi a0, 0x40100000\n" + "wsr a0, vecbase\n": : :"memory"); + __asm__ __volatile__("mov sp, %0;rsync" : : "r"(&__heap_start)); + BssClean(); +#ifdef __GNUC__ + ArchStackGuardInit(); +#endif + OsSetMainTask(); + OsCurrTaskSet(OsGetMainTask()); + printf("\n********Hello Huawei LiteOS********\n" + "\nLiteOS Kernel Version : %s\n" + "build data : %s %s\n\n" + "**********************************\n", + HW_LITEOS_KERNEL_VERSION_STRING, __DATE__, __TIME__); + + UINT32 ret = OsMain(); + if (ret != LOS_OK) { + return LOS_NOK; + } + OsStart(); + + return LOS_OK; +} + diff --git a/targets/ESP8266/Src/usart.c b/targets/ESP8266/Src/usart.c new file mode 100644 index 0000000000000000000000000000000000000000..3a962ae747d83a18148eb4d3fb25a2c6fba92de1 --- /dev/null +++ b/targets/ESP8266/Src/usart.c @@ -0,0 +1,93 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Usart Init Implementation + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include "usart.h" +#include "los_hwi.h" +#include "platform.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +VOID UartWriteChar(const CHAR c) +{ + UINT32 txFifoCnt; + do { + txFifoCnt = (REG32_READ(UART_STATUS_REG) >> TXFIFP_CNT_SHIFT) & TXFIFO_CNT_MASK; + } while (txFifoCnt == (UART_FIFO_BUFFER - 1)); + REG32_WRITE(UART_FIFO_REG, c); +} + +UINT8 UartReadChar(VOID) +{ + UINT8 RxFifoCnt = REG32_READ(UART_STATUS_REG);; + UINT8 c = 0; + if (RxFifoCnt > 0) { + c = REG32_READ(UART_FIFO_REG); + } + return c; +} + +VOID UartPutc(CHAR c) { + UartWriteChar(c); +} + +STATIC VOID UartHandler(VOID) +{ + uart_getc(); + REG32_MASK_SET(UART_INTCLR_REG, RXFIFO_TOUT_INT_MASK | RXFIFO_FULL_INT_MASK); + LOS_HwiClear(NUM_HAL_INTERRUPT_UART); +} + +STATIC INT32 UartHwi(VOID) +{ + UINT32 ret = LOS_HwiCreate(NUM_HAL_INTERRUPT_UART, 0, 0, UartHandler, NULL); + if (ret != LOS_OK) { + PRINT_ERR("%s, %d, uart interrupt created failed, ret = %x.\n", __FILE__, __LINE__, ret); + } else { + REG32_MASK_SET(UART_INTCLR_REG, RXFIFO_TOUT_INT_MASK | RXFIFO_FULL_INT_MASK); + REG32_MASK_SET(UART_INTENA_REG, RXFIFO_TOUT_INT_MASK | RXFIFO_FULL_INT_MASK); + LOS_HwiEnable(NUM_HAL_INTERRUPT_UART); + } + return ret; +} + +UartControllerOps g_genericUart = { + .uartInit = NULL, + .uartWriteChar = UartWriteChar, + .uartReadChar = UartReadChar, + .uartHwiCreate = UartHwi, +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/targets/ESP8266/include/asm/interrupt_config.h b/targets/ESP8266/include/asm/interrupt_config.h new file mode 100644 index 0000000000000000000000000000000000000000..4df33492a2ea1e1def1f4c39eebd7eba98fcb348 --- /dev/null +++ b/targets/ESP8266/include/asm/interrupt_config.h @@ -0,0 +1,48 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Interrupt Config HeadFile + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _ASM_INTERRUPT_CONFIG_H +#define _ASM_INTERRUPT_CONFIG_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +/* interrupts */ +#define OS_TICK_INT_NUM 6 +#define NUM_HAL_INTERRUPT_UART 5 + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _ASM_INTERRUPT_CONFIG_H */ diff --git a/targets/ESP8266/include/asm/memmap_config.h b/targets/ESP8266/include/asm/memmap_config.h new file mode 100644 index 0000000000000000000000000000000000000000..2cb355ddb73193f16987459b19b36815a07403c1 --- /dev/null +++ b/targets/ESP8266/include/asm/memmap_config.h @@ -0,0 +1,48 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Memory Map Config HeadFile + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _MEMMAP_CONFIG_H +#define _MEMMAP_CONFIG_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +extern char __heap_start; +#define OS_SYS_MEM_ADDR ((VOID *)(&__heap_start)) +#define OS_SYS_MEM_SIZE (UINT32)(0x3FFE8000 + 0x18000 - (UINT32)&__heap_start) + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _MEMMAP_CONFIG_H */ diff --git a/targets/ESP8266/include/asm/platform.h b/targets/ESP8266/include/asm/platform.h new file mode 100644 index 0000000000000000000000000000000000000000..9bc18bc1e272f2f14b2a89e37049a4ad57959879 --- /dev/null +++ b/targets/ESP8266/include/asm/platform.h @@ -0,0 +1,56 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Platform HeadFile + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _ASM_PLATFORM_H +#define _ASM_PLATFORM_H + +#include "los_typedef.h" +#include "uart.h" +#include "arch/regs.h" +#include "interrupt_config.h" +#include "memmap_config.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define OS_SYS_CLOCK 80000000 + +#ifdef LOSCFG_PLATFORM_OSAPPINIT +extern VOID app_init(VOID); +#endif + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _ASM_PLATFORM_H */ diff --git a/targets/ESP8266/include/hisoc/clock.h b/targets/ESP8266/include/hisoc/clock.h new file mode 100644 index 0000000000000000000000000000000000000000..fa3823cf8713b184fc8ef920b57f92d8329b8c88 --- /dev/null +++ b/targets/ESP8266/include/hisoc/clock.h @@ -0,0 +1,48 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Clock HeadFile + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _CLOCK_H +#define _CLOCK_H + +#include "asm/platform.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C"{ +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define get_bus_clk() OS_SYS_CLOCK + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _CLOCK_H */ diff --git a/targets/ESP8266/liteos.ld b/targets/ESP8266/liteos.ld new file mode 100644 index 0000000000000000000000000000000000000000..eb8569bd7241ea4ce11fc9ad7fc10877d1f083b9 --- /dev/null +++ b/targets/ESP8266/liteos.ld @@ -0,0 +1,102 @@ +MEMORY +{ + iram (RX) : org = 0x40100000, len = 0xC000 + irom (RX) : org = 0x40200010 + (0x10000 & (0x100000 - 1)), + len = 0xf0000 - 0x10 + dram (RW) : org = 0x3FFE8000, len = 0x18000 +} +ENTRY(main); +SECTIONS +{ + .iram0.vectors : + { + _init_start = ABSOLUTE(.); + KEEP(*(.SystemInfoVector.text)); + . = 0x10; + KEEP(*(.DebugExceptionHandler.text)); + . = 0x20; + KEEP(*(.NMIExceptionHandler.text)); + . = 0x30; + KEEP(*(.KernelExceptionHandler.text)); + . = 0x50; + KEEP(*(.UserExceptionHandler.text)); + . = 0x70; + KEEP(*(.DoubleExceptionHandler.text)); + . = ALIGN (16); + + } > iram + + .iram0.text : + { + _iram_text_start = ABSOLUTE(.); + + *( .iram .iram* .iram1 .iram1.* .literal .text) + + _iram_text_end = ABSOLUTE(.); + } > iram + + .dram0.data : + { + _data_start = ABSOLUTE(.); + __ram_data_start = ABSOLUTE(.); + *(.data1) + *(.sdata) + *(.sdata.*) + KEEP (*(SORT(.liteos.table.*))); + *(.dram0 .dram0.*) + + *( .data .data.* ) + __ram_data_end = ABSOLUTE(.); + _data_end = ABSOLUTE(.); + . = ALIGN(4); + } > dram + + /* Shared RAM */ + .dram0.bss (NOLOAD) : + { + . = ALIGN (8); + __bss_start = ABSOLUTE(.); + + *(EXCLUDE_FILE(*libcore.a) .bss EXCLUDE_FILE(*libcore.a) .bss.* EXCLUDE_FILE(*libcore.a )COMMON) + *(.sbss) + *(.sbss.*) + . = ALIGN (8); + __bss_end = ABSOLUTE(.); + . += 0x2000; + __heap_start = ABSOLUTE(.); + } > dram + + .flash.text : + { + + _stext = .; + _text_start = ABSOLUTE(.); + __text_start = ABSOLUTE(.); + *( .literal.* .text .text.*) + __text_end = ABSOLUTE(.); + _text_end = ABSOLUTE(.); + _etext = .; + } >irom + + .flash.rodata ALIGN(4) : + { + __rodata_start = ABSOLUTE(.); + . = 0x8; + *(.rodata_desc .rodata_desc.*) + *(.rodata .rodata.*) + *(.gnu.version_r) + + __init_array_start = ABSOLUTE(.); + KEEP (.ctors*) + __init_array_end = ABSOLUTE(.); + __rodata_end = ABSOLUTE(.); + + } >irom + + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/targets/ESP8266/os_adapt/os_adapt.c b/targets/ESP8266/os_adapt/os_adapt.c new file mode 100644 index 0000000000000000000000000000000000000000..bbfacd37ab171edb965a95dbcf40b1ce8de0a48d --- /dev/null +++ b/targets/ESP8266/os_adapt/os_adapt.c @@ -0,0 +1,49 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved. + * Description: Os Adapt Implementation + * Author: Huawei LiteOS Team + * Create: 2021-10-28 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include +#include "los_typedef.h" +#include "demo_entry.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +__attribute__((weak)) VOID app_init(VOID) +{ + printf("app init!\n"); + DemoEntry(); +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/targets/Kconfig.xtensa b/targets/Kconfig.xtensa index 3257c0a589a140547b61b33475b3b9c5a6cd6039..039b6895c9190b597801629795a51829d2529b7b 100644 --- a/targets/Kconfig.xtensa +++ b/targets/Kconfig.xtensa @@ -1,6 +1,21 @@ config LOSCFG_PLATFORM string default "ESP32" if LOSCFG_PLATFORM_ESP32 + default "ESP8266" if LOSCFG_PLATFORM_ESP8266 + +config LOSCFG_XTENSA_WINDOWSPILL + bool "Enable Window Spill" + default y + depends on LOSCFG_ARCH_XTENSA_LX6 + help + XTENSA window spill + +config LOSCFG_XTENSA_LOOPS + bool "Enable Xtensa Loops" + default y + depends on LOSCFG_ARCH_XTENSA_LX6 + help + XTENSA loop choice prompt "Board" @@ -8,6 +23,7 @@ choice default LOSCFG_PLATFORM_ESP32 help ESP32 + ESP8266 config LOSCFG_PLATFORM_ESP32 bool "ESP32" @@ -16,5 +32,12 @@ config LOSCFG_PLATFORM_ESP32 select LOSCFG_XTENSA_LX6_TIMER select LOSCFG_LX6_INT_CONTROLLER +config LOSCFG_PLATFORM_ESP8266 + bool "ESP8266" + select LOSCFG_USING_BOARD_LD + select LOSCFG_ARCH_XTENSA_L106 + select LOSCFG_XTENSA_LX6_TIMER + select LOSCFG_LX6_INT_CONTROLLER + endchoice diff --git a/targets/Raspberry_Pi4B/Src/usart.c b/targets/Raspberry_Pi4B/Src/usart.c index ee40cf339b7426d8304c3e875a5c493870ab517f..24aef92ebd43c5a3c0eb43357c281d423c3b5765 100644 --- a/targets/Raspberry_Pi4B/Src/usart.c +++ b/targets/Raspberry_Pi4B/Src/usart.c @@ -96,7 +96,7 @@ INT32 UsartHwi(VOID) PRINT_ERR("%s,%d, uart interrupt created error:%x\n", __FUNCTION__, __LINE__, ret); } else { REG32_WRITE(AUX_MU_IER_REG, 0x1); - HalIrqUnmask(NUM_HAL_INTERRUPT_UART); + ArchIrqUnmask(NUM_HAL_INTERRUPT_UART); } return ret; } diff --git a/tools/build/config/ESP32.config b/tools/build/config/ESP32.config index 32deb120c4cde337a120eb64c0d60b3114ab1270..ad09799d9cbf5d7e45d56af872c180c90901f50d 100644 --- a/tools/build/config/ESP32.config +++ b/tools/build/config/ESP32.config @@ -29,7 +29,10 @@ LOSCFG_COMPILER_OPTIMIZE_NONE=y # LOSCFG_FAMILY_STM32 is not set LOSCFG_FAMILY_XTENSA=y LOSCFG_PLATFORM="ESP32" +LOSCFG_XTENSA_WINDOWSPILL=y +LOSCFG_XTENSA_LOOPS=y LOSCFG_PLATFORM_ESP32=y +# LOSCFG_PLATFORM_ESP8266 is not set LOSCFG_USING_BOARD_LD=y # LOSCFG_HW_QSPI is not set LOSCFG_ARCH_CPU="xtensa-lx6" @@ -431,6 +434,7 @@ CMSIS_OS_VER=1 # LOSCFG_COMPILE_DEBUG=y LOSCFG_PLATFORM_ADAPT=y +LOSCFG_BACKTRACE=y # LOSCFG_ENABLE_MAGICKEY is not set # LOSCFG_THUMB is not set LOSCFG_DEBUG_VERSION=y diff --git a/tools/build/config/ESP8266.config b/tools/build/config/ESP8266.config new file mode 100644 index 0000000000000000000000000000000000000000..4ab18d3cc610fac5f60da3fdc04293ab945e961e --- /dev/null +++ b/tools/build/config/ESP8266.config @@ -0,0 +1,464 @@ +# Generated by Huawei LiteOS Kconfig Tool +# +# Compiler +# +LOSCFG_COMPILER_GCC=y +# LOSCFG_COMPILER_XTENSA_32 is not set +# LOSCFG_COMPILER_XTENSA_LX6 is not set +LOSCFG_COMPILER_XTENSA_L106=y + +# +# Compiler Options +# +# end of Compiler Options + +LOSCFG_COMPILER_OPTIMIZE_NONE=y +# LOSCFG_COMPILER_OPTIMIZE_SPEED is not set +# LOSCFG_COMPILER_OPTIMIZE_SIZE is not set +# end of Compiler + +# +# Targets +# +# LOSCFG_FAMILY_APM32 is not set +# LOSCFG_FAMILY_CSKY is not set +# LOSCFG_FAMILY_FMSH is not set +# LOSCFG_FAMILY_GD is not set +# LOSCFG_FAMILY_QEMU is not set +# LOSCFG_FAMILY_RASPBERRY is not set +# LOSCFG_FAMILY_SIFIVE is not set +# LOSCFG_FAMILY_STM32 is not set +LOSCFG_FAMILY_XTENSA=y +LOSCFG_PLATFORM="ESP8266" +# LOSCFG_PLATFORM_ESP32 is not set +LOSCFG_PLATFORM_ESP8266=y +LOSCFG_USING_BOARD_LD=y +# LOSCFG_HW_QSPI is not set +LOSCFG_ARCH_CPU="xtensa-l106" +LOSCFG_ARCH_XTENSA=y +LOSCFG_ARCH_XTENSA_ARCH32=y +LOSCFG_ARCH_XTENSA_L106=y +LOSCFG_APC_ENABLE=y +# end of Targets + +# +# Kernel +# + +# +# Basic Config +# +LOSCFG_SCHED_SQ=y + +# +# Task +# +LOSCFG_BASE_CORE_TIMESLICE=y +LOSCFG_BASE_CORE_TIMESLICE_TIMEOUT=2 +LOSCFG_OBSOLETE_API=y +LOSCFG_BASE_CORE_TSK_MONITOR=y +# LOSCFG_TASK_STATIC_ALLOCATION is not set +LOSCFG_BASE_CORE_TSK_LIMIT=16 +LOSCFG_BASE_CORE_TSK_MIN_STACK_SIZE=1536 +LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE=4096 +LOSCFG_BASE_CORE_TSK_SWTMR_STACK_SIZE=2048 +LOSCFG_BASE_CORE_TSK_IDLE_STACK_SIZE=2048 +LOSCFG_BASE_CORE_TSK_DEFAULT_PRIO=10 +LOSCFG_BASE_CORE_TICK_PER_SECOND=1000 +# end of Task + +LOSCFG_BASE_CORE_USE_MULTI_LIST=y +# LOSCFG_BASE_CORE_USE_SINGLE_LIST is not set +# end of Basic Config + +# +# Memory Management +# +# LOSCFG_KERNEL_MEM_BESTFIT is not set +LOSCFG_KERNEL_MEM_BESTFIT_LITTLE=y +# LOSCFG_KERNEL_MEM_SLAB_EXTENTION is not set +LOSCFG_MEM_TASK_STAT=y +LOSCFG_KERNEL_MEMBOX=y +LOSCFG_KERNEL_MEMBOX_STATIC=y +# LOSCFG_KERNEL_MEMBOX_DYNAMIC is not set +# end of Memory Management + +# +# Interrupt Management +# +LOSCFG_SHARED_IRQ=y +LOSCFG_PLATFORM_HWI_LIMIT=256 +LOSCFG_HWI_PRIO_LIMIT=32 +# end of Interrupt Management + +# +# Exception Management +# +# LOSCFG_ARCH_EXC_SIMPLE_INFO is not set +# LOSCFG_SHELL_EXCINFO_DUMP is not set +# end of Exception Management + +LOSCFG_BASE_CORE_SWTMR=y +LOSCFG_BASE_CORE_SWTMR_LIMIT=16 +# LOSCFG_BASE_CORE_SWTMR_IN_ISR is not set +LOSCFG_BASE_IPC_QUEUE=y +# LOSCFG_QUEUE_STATIC_ALLOCATION is not set +LOSCFG_BASE_IPC_QUEUE_LIMIT=10 +LOSCFG_BASE_IPC_EVENT=y +LOSCFG_BASE_IPC_MUX=y +LOSCFG_MUTEX_WAITMODE_PRIO=y +# LOSCFG_MUTEX_WAITMODE_FIFO is not set +LOSCFG_BASE_IPC_MUX_LIMIT=20 +LOSCFG_BASE_IPC_SEM=y +LOSCFG_BASE_IPC_SEM_LIMIT=20 +# LOSCFG_KERNEL_NX is not set +# LOSCFG_KERNEL_RINGBUF is not set +# LOSCFG_KERNEL_EXTKERNEL is not set +# LOSCFG_BASE_CORE_SYS_RES_CHECK is not set +# end of Kernel + +# +# Lib +# +LOSCFG_LIB_LIBC=y +LOSCFG_COMPAT_POSIX=y +LOSCFG_LIB_LIBM=y +LOSCFG_LIB_STDIO=y +# LOSCFG_SUPPORT_LONG_DOUBLE is not set +# LOSCFG_LIB_ZLIB is not set +# LOSCFG_LIB_CPP_EXTEND is not set +# end of Lib + +# +# Compat +# +LOSCFG_COMPAT_CMSIS=y +CMSIS_OS_VER=1 +# end of Compat + +# +# Components +# + +# +# Ai +# +# LOSCFG_COMPONENTS_AI is not set +# end of Ai + +# +# Network +# +# LOSCFG_COMPONENTS_NET_LWIP is not set +# LOSCFG_COMPONENTS_NET_IFCONFIG is not set +# LOSCFG_COMPONENTS_NET_PING is not set +# LOSCFG_COMPONENTS_NET_AT is not set +# LOSCFG_COMPONENTS_NET_SAL is not set +# LOSCFG_COMPONENTS_PCAP is not set +# LOSCFG_COMPONENTS_IPERF is not set +# LOSCFG_COMPONENTS_TFTP_SERVER is not set +# LOSCFG_COMPONENTS_LIBRWS is not set +# LOSCFG_COMPONENTS_HTTP_PARSER is not set +# end of Network + +# +# Connectivity +# +# LOSCFG_COMPONENTS_CONNECTIVITY_MQTT is not set +# LOSCFG_COMPONENTS_CONNECTIVITY_LWM2M is not set +# LOSCFG_COMPONENTS_ATINY_MQTT is not set +# LOSCFG_COMPONENTS_ATINY_LWM2M is not set +# LOSCFG_COMPONENTS_CONNECTIVITY_NB_IOT is not set +# LOSCFG_COMPONENTS_ATINY_LOG is not set +# end of Connectivity + +# +# FileSystem +# +# LOSCFG_COMPONENTS_FS_FATFS is not set +# LOSCFG_COMPONENTS_FS_LITTLEFS is not set +# LOSCFG_COMPONENTS_FS_RAMFS is not set +# LOSCFG_COMPONENTS_FS_SPIFFS is not set +# end of FileSystem + +# +# Graphical User Interface +# +# end of Graphical User Interface + +# +# Language +# +# LOSCFG_COMPONENTS_JERRYSCRIPT is not set +# LOSCFG_COMPONENTS_LUA is not set +# LOSCFG_COMPONENTS_MICROPYTHON is not set +# end of Language + +# +# Lib +# +# LOSCFG_COMPONENTS_LIB_CJSON is not set +# end of Lib + +# +# Media +# +# LOSCFG_COMPONENTS_LIBPNG is not set +# LOSCFG_COMPONENTS_OPENEXIF is not set +# LOSCFG_COMPONENTS_OPUS is not set +# LOSCFG_COMPONENTS_PIXMAN is not set +# LOSCFG_COMPONENTS_UPNP is not set +# LOSCFG_COMPONENTS_TJPGDEC is not set +# end of Media + +# +# Security +# +# LOSCFG_COMPONENTS_SECURITY_MBEDTLS is not set +# LOSCFG_COMPONENTS_OPENSSL is not set +# LOSCFG_COMPONENTS_RHASH is not set +# LOSCFG_COMPONENTS_TINYCRYPT is not set +# end of Security + +# +# Sensorhub +# +# LOSCFG_COMPONENTS_SENSORHUB is not set +# end of Sensorhub + +# +# Utility +# +# LOSCFG_COMPONENTS_BIDIREFERENCE is not set +# LOSCFG_COMPONENTS_C_ALGORITHMS is not set +# LOSCFG_COMPONENTS_CURL is not set +# LOSCFG_COMPONENTS_EASYFLASH is not set +# LOSCFG_COMPONENTS_FASTLZ is not set +# LOSCFG_COMPONENTS_FREETYPE is not set +# LOSCFG_COMPONENTS_GENANN is not set +# LOSCFG_COMPONENTS_HARFBUZZ is not set +# LOSCFG_COMPONENTS_ICONV is not set +# LOSCFG_COMPONENTS_INIH is not set +# LOSCFG_COMPONENTS_INIPARSER is not set +# LOSCFG_COMPONENTS_JSMN is not set +# LOSCFG_COMPONENTS_JSON_C is not set +# LOSCFG_COMPONENTS_JSONCPP is not set +# LOSCFG_COMPONENTS_LIBXML2 is not set +# LOSCFG_COMPONENTS_MINMEA is not set +# LOSCFG_COMPONENTS_PDFGEN is not set +# LOSCFG_COMPONENTS_QRENCODE is not set +# LOSCFG_COMPONENTS_REGEX is not set +# LOSCFG_COMPONENTS_SFUD is not set +# LOSCFG_COMPONENTS_SQLITE is not set +# LOSCFG_COMPONENTS_THTTPD is not set +# LOSCFG_COMPONENTS_TINYFRAME is not set +# LOSCFG_COMPONENTS_TINYXML2 is not set +# LOSCFG_COMPONENTS_URIPARSER is not set +# end of Utility +# end of Components + +# +# Demos +# + +# +# Agent Tiny Lwm2m Demo +# +# LOSCFG_DEMOS_AGENT_TINY_LWM2M is not set +# end of Agent Tiny Lwm2m Demo + +# +# Agent Tiny Mqtt Demo +# +# LOSCFG_DEMOS_AGENT_TINY_MQTT is not set +# end of Agent Tiny Mqtt Demo + +# +# Agriculture Demo +# +# end of Agriculture Demo + +# +# Ai Demo +# +# LOSCFG_DEMOS_AI is not set +# end of Ai Demo + +# +# Drivers Demo +# +# LOSCFG_DEMO_CAN is not set +# end of Drivers Demo + +# +# Dtls Server Demo +# +# LOSCFG_DEMOS_DTLS_SERVER is not set +# end of Dtls Server Demo + +# +# FileSystem Demo +# +# LOSCFG_DEMOS_FS_FAT is not set +# LOSCFG_DEMOS_FS_LITTLEFS is not set +# LOSCFG_DEMOS_FS_RAM is not set +# LOSCFG_DEMOS_FS_SPIF is not set +# end of FileSystem Demo + +# +# Graphical User Interface Demo +# +# end of Graphical User Interface Demo + +# +# Http Client Demo +# +# LOSCFG_DEMOS_HTTP_CLIENT is not set +# end of Http Client Demo + +# +# Ipv6 Client Demo +# +# LOSCFG_DEMOS_IPV6_CLIENT is not set +# end of Ipv6 Client Demo + +# +# Kernel Demo +# +# LOSCFG_DEMOS_KERNEL is not set +# end of Kernel Demo + +# +# Language Demo +# +# LOSCFG_DEMOS_JERRYSCRIPT is not set +# LOSCFG_DEMOS_LUA is not set +# end of Language Demo + +# +# Librws Demo +# +# LOSCFG_DEMOS_LIBRWS is not set +# end of Librws Demo + +# +# LMS Demo +# +# end of LMS Demo + +# +# Media Demo +# +# LOSCFG_DEMOS_LIBPNG is not set +# LOSCFG_DEMOS_OPENEXIF is not set +# LOSCFG_DEMOS_OPUS is not set +# LOSCFG_DEMOS_PIXMAN is not set +# LOSCFG_DEMOS_UPNP is not set +# LOSCFG_DEMOS_TJPGDEC is not set +# end of Media Demo + +# +# NB-IoT Demo Without Atiny +# +# LOSCFG_DEMOS_NBIOT_WITHOUT_ATINY is not set +# end of NB-IoT Demo Without Atiny + +# +# PERF Demo +# +# end of PERF Demo + +# +# Security Demo +# +# LOSCFG_DEMOS_OPENSSL is not set +# LOSCFG_DEMOS_RHASH is not set +# LOSCFG_DEMOS_TINYCRYPT is not set +# end of Security Demo + +# +# Sensorhub Demo +# + +# +# only support Cloud_STM32F429IGTx_FIRE +# +# LOSCFG_DEMOS_SENSORHUB is not set +# end of Sensorhub Demo + +# +# Trace Demo +# +# LOSCFG_DEMOS_TRACE is not set +# end of Trace Demo + +# +# Utility Demo +# +# LOSCFG_DEMOS_BIDIREFERENCE is not set +# LOSCFG_DEMOS_C_ALGORITHMS is not set +# LOSCFG_DEMOS_CURL is not set +# LOSCFG_DEMOS_EASYFLASH is not set +# LOSCFG_DEMOS_FASTLZ is not set +# LOSCFG_DEMOS_FREETYPE is not set +# LOSCFG_DEMOS_GENANN is not set +# LOSCFG_DEMOS_HARFBUZZ is not set +# LOSCFG_DEMOS_ICONV is not set +# LOSCFG_DEMOS_INIH is not set +# LOSCFG_DEMOS_INIPARSER is not set +# LOSCFG_DEMOS_JSMN is not set +# LOSCFG_DEMOS_JSON_C is not set +# LOSCFG_DEMOS_JSONCPP is not set +# LOSCFG_DEMOS_LIBXML2 is not set +# LOSCFG_DEMOS_MINMEA is not set +# LOSCFG_DEMOS_PDFGEN is not set +# LOSCFG_DEMOS_QRENCODE is not set +# LOSCFG_DEMOS_SQLITE is not set +# LOSCFG_DEMOS_TINYFRAME is not set +# LOSCFG_DEMOS_TINYXML2 is not set +# LOSCFG_DEMOS_SFUD is not set +# LOSCFG_DEMOS_URIPARSER is not set +# end of Utility Demo +# end of Demos + +# +# Debug +# +LOSCFG_COMPILE_DEBUG=y +LOSCFG_PLATFORM_ADAPT=y +LOSCFG_BACKTRACE=y +LOSCFG_ENABLE_MAGICKEY=y +# LOSCFG_THUMB is not set +LOSCFG_DEBUG_VERSION=y +# LOSCFG_DEBUG_KERNEL is not set +LOSCFG_SHELL=y +LOSCFG_SHELL_UART=y +# LOSCFG_SHELL_EXTENDED_CMDS is not set +# LOSCFG_SHELL_DMESG is not set +# LOSCFG_MEM_DEBUG is not set +LOSCFG_SERIAL_OUTPUT_ENABLE=y + +# +# TestSuite or AppInit +# +LOSCFG_PLATFORM_OSAPPINIT=y +# end of TestSuite or AppInit +# end of Debug + +# +# Driver +# +# LOSCFG_DRIVERS_BASE is not set +LOSCFG_LX6_INT_CONTROLLER=y +LOSCFG_XTENSA_LX6_TIMER=y +LOSCFG_DRIVERS_SIMPLE_UART=y +# end of Driver + +# +# Stack Smashing Protector (SSP) Compiler Feature +# +LOSCFG_CC_NO_STACKPROTECTOR=y +# LOSCFG_CC_STACKPROTECTOR is not set +# LOSCFG_CC_STACKPROTECTOR_STRONG is not set +# LOSCFG_CC_STACKPROTECTOR_ALL is not set +# end of Stack Smashing Protector (SSP) Compiler Feature diff --git a/tools/menuconfig/config.in b/tools/menuconfig/config.in index 6615f6e9f95f1f2d2218c2753343224f55db97dd..cfe180293ff9d41be450d46e110251bded9f3672 100644 --- a/tools/menuconfig/config.in +++ b/tools/menuconfig/config.in @@ -79,6 +79,11 @@ config LOSCFG_COMPILER_XTENSA_LX6 depends on LOSCFG_ARCH_XTENSA_ARCH32 select LOSCFG_COMPILER_GCC +config LOSCFG_COMPILER_XTENSA_L106 + bool "xtensa-lx106-elf-" + depends on LOSCFG_ARCH_XTENSA_ARCH32 + select LOSCFG_COMPILER_GCC + endchoice menu "Compiler Options" @@ -201,9 +206,8 @@ config LOSCFG_PLATFORM_ADAPT config LOSCFG_BACKTRACE bool "Enable Backtrace" default y - depends on !LOSCFG_ARCH_XTENSA help - Answer Y to enable backtrace for LiteOS. + Answer Y to enable backtrace for LiteOS. #config LOSCFG_GDB # bool "Enable GDB"