DHL (Dynamic Hardware Function Libraries) is a high performance FPGA-CPU co-design framework for accelerating software NFs (Network Functions) with Intel DPDK.
This project is to implement a combination lock on the FPGA board using VHDL language and finite state machine. There are some possible solutions are provided to address the problems including debounce, random number generation and combination check.
This project is to implement a combination lock on the FPGA board using VHDL language and finite state machine. There are some possible solutions are provided to address the problems including debounce, random number generation and combination check.
