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Gitee 极速下载 / lowRISCVerilog

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此仓库是为了提升国内下载速度的镜像仓库,每日同步一次。 原始仓库: https://github.com/lowrisc/lowrisc-chip
lowRISC 目的是开发一个完全开放的硬件平台,从处理器到开发版 spread retract

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[submodule "riscv-tools"]
path = riscv-tools
url = https://github.com/lowrisc/riscv-tools.git
[submodule "chisel"]
path = chisel
url = https://github.com/lowrisc/chisel.git
[submodule "hardfloat"]
path = hardfloat
url = https://github.com/ucb-bar/berkeley-hardfloat.git
[submodule "fpga"]
path = fpga
url = https://github.com/lowrisc/lowrisc-fpga.git
[submodule "rocket"]
path = rocket
url = https://github.com/lowrisc/rocket.git
[submodule "uncore"]
path = uncore
url = https://github.com/lowrisc/uncore.git
[submodule "socip"]
path = socip
url = https://github.com/lowrisc/socip.git
[submodule "junctions"]
path = junctions
url = https://github.com/lowrisc/junctions.git
[submodule "context-dependent-environments"]
path = context-dependent-environments
url = https://github.com/lowrisc/context-dependent-environments.git
[submodule "opensocdebug/hardware"]
path = opensocdebug/hardware
url = https://github.com/opensocdebug/hardware
[submodule "opensocdebug/glip"]
path = opensocdebug/glip
url = https://github.com/tum-lis/glip
[submodule "opensocdebug/software"]
path = opensocdebug/software
url = https://github.com/opensocdebug/software
[submodule "vsim/riscv-tests"]
path = vsim/riscv-tests
url = https://github.com/lowrisc/riscv-tests.git
[submodule "minion_subsystem"]
path = minion_subsystem
url = https://github.com/lowrisc/minion_subsystem.git
[submodule "vcs/riscv-tests"]
path = vcs/riscv-tests
url = https://github.com/lowrisc/riscv-tests.git

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