From a8c847f28e885f7ef07b3fd3fc415e2ce4113ee8 Mon Sep 17 00:00:00 2001
From: Dongdong Liu <liudongdong3@huawei.com>
Date: Fri, 21 Oct 2022 15:36:08 +0800
Subject: [PATCH 132/189] net/hns3: delete unused code

The RTE_HNS3_ONLY_1630_FPGA macro is not in use, so delete the code.

Fixes: 2192c428f9a6 ("net/hns3: fix firmware compatibility configuration")
Fixes: bdaf190f8235 ("net/hns3: support link speed autoneg for PF")
Cc: stable@dpdk.org

Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
---
 drivers/net/hns3/hns3_cmd.c    | 33 ---------------------------------
 drivers/net/hns3/hns3_ethdev.c | 11 ++---------
 2 files changed, 2 insertions(+), 42 deletions(-)

diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index e3d096d9cb..50cb3eabb1 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -631,39 +631,6 @@ hns3_firmware_compat_config(struct hns3_hw *hw, bool is_init)
 	struct hns3_cmd_desc desc;
 	uint32_t compat = 0;
 
-#if defined(RTE_HNS3_ONLY_1630_FPGA)
-	/* If resv reg enabled phy driver of imp is not configured, driver
-	 * will use temporary phy driver.
-	 */
-	struct rte_pci_device *pci_dev;
-	struct rte_eth_dev *eth_dev;
-	uint8_t revision;
-	int ret;
-
-	eth_dev = &rte_eth_devices[hw->data->port_id];
-	pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
-	/* Get PCI revision id */
-	ret = rte_pci_read_config(pci_dev, &revision, HNS3_PCI_REVISION_ID_LEN,
-				  HNS3_PCI_REVISION_ID);
-	if (ret != HNS3_PCI_REVISION_ID_LEN) {
-		PMD_INIT_LOG(ERR, "failed to read pci revision id, ret = %d",
-			     ret);
-		return -EIO;
-	}
-	if (revision == PCI_REVISION_ID_HIP09_A) {
-		struct hns3_pf *pf = HNS3_DEV_HW_TO_PF(hw);
-		if (hns3_dev_get_support(hw, COPPER) == 0 || pf->is_tmp_phy) {
-			PMD_INIT_LOG(ERR, "***use temp phy driver in dpdk***");
-			pf->is_tmp_phy = true;
-			hns3_set_bit(hw->capability,
-				     HNS3_DEV_SUPPORT_COPPER_B, 1);
-			return 0;
-		}
-
-		PMD_INIT_LOG(ERR, "***use phy driver in imp***");
-	}
-#endif
-
 	hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_FIRMWARE_COMPAT_CFG, false);
 	req = (struct hns3_firmware_compat_cmd *)desc.data;
 
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 7c9938b96e..401736f5a6 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -4970,17 +4970,10 @@ hns3_set_port_link_speed(struct hns3_hw *hw,
 {
 	int ret;
 
-	if (hw->mac.media_type == HNS3_MEDIA_TYPE_COPPER) {
-#if defined(RTE_HNS3_ONLY_1630_FPGA)
-		struct hns3_pf *pf = HNS3_DEV_HW_TO_PF(hw);
-		if (pf->is_tmp_phy)
-			return 0;
-#endif
-
+	if (hw->mac.media_type == HNS3_MEDIA_TYPE_COPPER)
 		ret = hns3_set_copper_port_link_speed(hw, cfg);
-	} else {
+	else
 		ret = hns3_set_fiber_port_link_speed(hw, cfg);
-	}
 
 	if (ret) {
 		hns3_err(hw, "failed to set %s port link speed, ret = %d.",
-- 
2.23.0