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00000 n +0002155443 00000 n +0002155483 00000 n +0002155542 00000 n +trailer +<> +startxref +116 +%%EOF diff --git a/src/arch/arm32/mach-versatile/README-en-US.md b/src/arch/arm32/mach-versatile/README-en-US.md new file mode 100755 index 0000000000000000000000000000000000000000..574e0da45150970286c4d4f50a392f7e75aa7709 --- /dev/null +++ b/src/arch/arm32/mach-versatile/README-en-US.md @@ -0,0 +1,46 @@ +# ARM Versatile + +*** + +## Compile source code and generate the target files at the output directory +```shell +make clean +make CROSS_COMPILE=/path/to/arm-none-eabihf- PLATFORM=arm32-versatile +``` + +## Load and run using the QEMU emulator +```shell +./tools/qemu-system/linux/versatile-run.sh +``` + +```shell + +``` + +# Navigation Pages + +* Xboot official home page + + https://xboot.github.io/ + +* XBOOT source code(open source completely),registered in `github`,please `star` and `fork` a copy directly,if you want to merge it, just sent `pull request` + + https://github.com/xboot/xboot + +* XBOOT show case pages，In XBOOT show case page,you can have an intuitive feel. + + https://github.com/xboot/xboot/blob/master/documents/xboot-show-case-en-US.md + +* XBOOT system development guide + + https://github.com/xboot/xboot/blob/master/documents/xboot-system-development-guide-en-US.md + +* XBOOT application development guide + + https://github.com/xboot/xboot/blob/master/documents/xboot-application-development-guide-en-US.md + +* XBOOT official tencent qq group,many big brother, welcome to join us. + + [658250248](https://jq.qq.com/?_wv=1027&k=5BOkXYO) (2000 peoples) + +* You can isuse us if you have any question. diff --git a/src/arch/arm32/mach-versatile/README-zh-CN.md b/src/arch/arm32/mach-versatile/README-zh-CN.md new file mode 100755 index 0000000000000000000000000000000000000000..3e791041cc123fe9aa17ac5db2117b6f407105c3 --- /dev/null +++ b/src/arch/arm32/mach-versatile/README-zh-CN.md @@ -0,0 +1,34 @@ +# ARM Versatile + +*** + +## 编译源码，生成的目标文件在output目录下 +```shell +make clean +make CROSS_COMPILE=/path/to/arm-none-eabihf- PLATFORM=arm32-versatile +``` + +## 使用qemu模拟器加载运行 +```shell +./tools/qemu-system/linux/versatile-run.sh +``` + +# 相关网址 + +- XBOOT官方首页 + https://xboot.github.io/ + +- XBOOT源码(完全开源)，寄存在github，请直接`fork`一份代码，如需申请合并，直接`pull request`即可 + https://github.com/xboot/xboot + +- XBOOT运行效果展示页面，首次接触的用户，建议观看，对XBOOT有个直观的感受 + https://github.com/xboot/xboot/blob/master/documents/xboot-show-case-zh-CN.md + +- XBOOT系统开发指南 + https://github.com/xboot/xboot/blob/master/documents/xboot-system-development-guide-zh-CN.md + +- XBOOT应用开发指南 + https://github.com/xboot/xboot/blob/master/documents/xboot-application-development-guide-zh-CN.md + +- XBOOT官方QQ群，大佬聚集，请踊跃加入 + [658250248](https://jq.qq.com/?_wv=1027&k=5BOkXYO) (2000人) \ No newline at end of file diff --git a/src/arch/arm32/mach-versatile/cache-v5.c b/src/arch/arm32/mach-versatile/cache-v5.c new file mode 100755 index 0000000000000000000000000000000000000000..6ca3447549167bee4b9ffbc55a8f3466054007ae --- /dev/null +++ b/src/arch/arm32/mach-versatile/cache-v5.c @@ -0,0 +1,112 @@ +/* + * cache-v5.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include + +static inline uint32_t get_cache(void) +{ + uint32_t cache; + + __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 1" : "=r" (cache)); + return cache; +} + +static inline void __v5_cache_flush_range(uint32_t start, uint32_t stop, uint32_t line) +{ + uint32_t mva; + + start &= ~(line - 1); + if(stop & (line - 1)) + stop = (stop + line) & ~(line - 1); + for(mva = start; mva < stop; mva = mva + line) + { + __asm__ __volatile__("mcr p15, 0, %0, c7, c14, 1" : : "r" (mva)); + } +} + +static inline void __v5_cache_inv_range(uint32_t start, uint32_t stop, uint32_t line) +{ + uint32_t mva; + + start &= ~(line - 1); + if(stop & (line - 1)) + stop = (stop + line) & ~(line - 1); + for(mva = start; mva < stop; mva = mva + line) + { + __asm__ __volatile__("mcr p15, 0, %0, c7, c6, 1" : : "r" (mva)); + } +} + +/* + * Flush range(clean & invalidate), affects the range [start, stop - 1] + */ +void cache_flush_range(unsigned long start, unsigned long stop) +{ + uint32_t cache; + uint32_t line; + + cache = get_cache(); + line = 1 << ((cache & 0x3) + 3); + __v5_cache_flush_range(start, stop, line); + dsb(); +} + +/* + * Invalidate range, affects the range [start, stop - 1] + */ +void cache_inv_range(unsigned long start, unsigned long stop) +{ + uint32_t cache; + uint32_t line; + + cache = get_cache(); + line = 1 << ((cache & 0x3) + 3); + __v5_cache_inv_range(start, stop, line); + dsb(); +} + +static void __outer_cache_enable(void) +{ +} +extern __typeof(__outer_cache_enable) outer_cache_enable __attribute__((weak, alias("__outer_cache_enable"))); + +static void __outer_cache_disable(void) +{ +} +extern __typeof(__outer_cache_disable) outer_cache_disable __attribute__((weak, alias("__outer_cache_disable"))); + +static void __outer_cache_flush_range(unsigned long start, unsigned long stop) +{ +} +extern __typeof(__outer_cache_flush_range) outer_cache_flush_range __attribute__((weak, alias("__outer_cache_flush_range"))); + +static void __outer_cache_inv_range(unsigned long start, unsigned long stop) +{ +} +extern __typeof(__outer_cache_inv_range) outer_cache_inv_range __attribute__((weak, alias("__outer_cache_inv_range"))); + diff --git a/src/arch/arm32/mach-versatile/dmapool.c b/src/arch/arm32/mach-versatile/dmapool.c new file mode 100755 index 0000000000000000000000000000000000000000..c77041b9e4141d69efa5f05d4918acf09f287df9 --- /dev/null +++ b/src/arch/arm32/mach-versatile/dmapool.c @@ -0,0 +1,81 @@ +/* + * dmapool.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include + +extern unsigned char __dma_start[]; +extern unsigned char __dma_end[]; + +static void * __dma_pool = NULL; +static spinlock_t __dma_lock = SPIN_LOCK_INIT(); + +void * dma_alloc_coherent(unsigned long size) +{ + irq_flags_t flags; + void * m; + + if(!__dma_pool) + __dma_pool = mm_create((void *)__dma_start, (size_t)(__dma_end - __dma_start)); + if(__dma_pool) + { + spin_lock_irqsave(&__dma_lock, flags); + m = mm_memalign(__dma_pool, SZ_4K, size); + spin_unlock_irqrestore(&__dma_lock, flags); + return m; + } + return NULL; +} + +void dma_free_coherent(void * addr) +{ + irq_flags_t flags; + + if(__dma_pool) + { + spin_lock_irqsave(&__dma_lock, flags); + mm_free(__dma_pool, addr); + spin_unlock_irqrestore(&__dma_lock, flags); + } +} + +void dma_cache_sync(void * addr, unsigned long size, int dir) +{ + unsigned long start = (unsigned long)addr; + unsigned long stop = start + size; + + if(dir == DMA_FROM_DEVICE) + { + cache_inv_range(start, stop); + outer_cache_inv_range(start, stop); + } + else + { + cache_flush_range(start, stop); + outer_cache_flush_range(start, stop); + } +} diff --git a/src/arch/arm32/mach-versatile/driver/ce-sp804.c b/src/arch/arm32/mach-versatile/driver/ce-sp804.c new file mode 100755 index 0000000000000000000000000000000000000000..57ea402c075bd6ee9acf9b154bb42e6b71b9a851 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/ce-sp804.c @@ -0,0 +1,183 @@ +/* + * driver/ce-sp804.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include +#include + +#define TIMER_LOAD(x) (((x) * 0x20) + 0x00) +#define TIMER_VALUE(x) (((x) * 0x20) + 0x04) +#define TIMER_CTRL(x) (((x) * 0x20) + 0x08) +#define TIMER_ICLR(x) (((x) * 0x20) + 0x0c) +#define TIMER_RIS(x) (((x) * 0x20) + 0x10) +#define TIMER_MIS(x) (((x) * 0x20) + 0x14) +#define TIMER_BGLOAD(x) (((x) * 0x20) + 0x18) + +struct ce_sp804_pdata_t +{ + virtual_addr_t virt; + char * clk; + int irq; + int channel; +}; + +static void ce_sp804_interrupt(void * data) +{ + struct clockevent_t * ce = (struct clockevent_t *)data; + struct ce_sp804_pdata_t * pdat = (struct ce_sp804_pdata_t *)ce->priv; + write32(pdat->virt + TIMER_ICLR(pdat->channel), 0x0); + ce->handler(ce, ce->data); +} + +static bool_t ce_sp804_next(struct clockevent_t * ce, u64_t evt) +{ + struct ce_sp804_pdata_t * pdat = (struct ce_sp804_pdata_t *)ce->priv; + + write32(pdat->virt + TIMER_LOAD(pdat->channel), (evt & 0xffffffff)); + write32(pdat->virt + TIMER_VALUE(pdat->channel), (evt & 0xffffffff)); + write32(pdat->virt + TIMER_CTRL(pdat->channel), read32(pdat->virt + TIMER_CTRL(pdat->channel)) | (1 << 7)); + return TRUE; +} + +static struct device_t * ce_sp804_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct ce_sp804_pdata_t * pdat; + struct clockevent_t * ce; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + char * clk = dt_read_string(n, "clock-name", NULL); + int irq = dt_read_int(n, "interrupt", -1); + int channel = dt_read_int(n, "timer-channel", -1); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x804) + return NULL; + + if(!search_clk(clk)) + return NULL; + + if(!irq_is_valid(irq)) + return NULL; + + if(channel < 0 || channel > 1) + return NULL; + + pdat = malloc(sizeof(struct ce_sp804_pdata_t)); + if(!pdat) + return NULL; + + ce = malloc(sizeof(struct clockevent_t)); + if(!ce) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->clk = strdup(clk); + pdat->irq = irq; + pdat->channel = channel; + + clk_enable(pdat->clk); + clockevent_calc_mult_shift(ce, clk_get_rate(pdat->clk), 10); + ce->name = alloc_device_name(dt_read_name(n), -1); + ce->min_delta_ns = clockevent_delta2ns(ce, 0x1); + ce->max_delta_ns = clockevent_delta2ns(ce, 0xffffffff); + ce->next = ce_sp804_next; + ce->priv = pdat; + + request_irq(pdat->irq, ce_sp804_interrupt, IRQ_TYPE_NONE, ce); + write32(pdat->virt + TIMER_CTRL(pdat->channel), 0); + write32(pdat->virt + TIMER_LOAD(pdat->channel), 0xffffffff); + write32(pdat->virt + TIMER_VALUE(pdat->channel), 0xffffffff); + write32(pdat->virt + TIMER_CTRL(pdat->channel), (1 << 0) | (1 << 1) | (0 << 2) | (1 << 5) | (0 << 6)); + + if(!(dev = register_clockevent(ce, drv))) + { + write32(pdat->virt + TIMER_CTRL(pdat->channel), 0); + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(ce->name); + free(ce->priv); + free(ce); + return NULL; + } + return dev; +} + +static void ce_sp804_remove(struct device_t * dev) +{ + struct clockevent_t * ce = (struct clockevent_t *)dev->priv; + struct ce_sp804_pdata_t * pdat = (struct ce_sp804_pdata_t *)ce->priv; + + if(ce) + { + unregister_clockevent(ce); + write32(pdat->virt + TIMER_CTRL(pdat->channel), 0); + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(ce->name); + free(ce->priv); + free(ce); + } +} + +static void ce_sp804_suspend(struct device_t * dev) +{ +} + +static void ce_sp804_resume(struct device_t * dev) +{ +} + +static struct driver_t ce_sp804 = { + .name = "ce-sp804", + .probe = ce_sp804_probe, + .remove = ce_sp804_remove, + .suspend = ce_sp804_suspend, + .resume = ce_sp804_resume, +}; + +static __init void ce_sp804_driver_init(void) +{ + register_driver(&ce_sp804); +} + +static __exit void ce_sp804_driver_exit(void) +{ + unregister_driver(&ce_sp804); +} + +driver_initcall(ce_sp804_driver_init); +driver_exitcall(ce_sp804_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/cs-sp804.c b/src/arch/arm32/mach-versatile/driver/cs-sp804.c new file mode 100755 index 0000000000000000000000000000000000000000..41579240e2c135e6e92559c6170233ff863114a2 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/cs-sp804.c @@ -0,0 +1,161 @@ +/* + * driver/cs-sp804.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include + +#define TIMER_LOAD(x) (((x) * 0x20) + 0x00) +#define TIMER_VALUE(x) (((x) * 0x20) + 0x04) +#define TIMER_CTRL(x) (((x) * 0x20) + 0x08) +#define TIMER_ICLR(x) (((x) * 0x20) + 0x0c) +#define TIMER_RIS(x) (((x) * 0x20) + 0x10) +#define TIMER_MIS(x) (((x) * 0x20) + 0x14) +#define TIMER_BGLOAD(x) (((x) * 0x20) + 0x18) + +struct cs_sp804_pdata_t +{ + virtual_addr_t virt; + char * clk; + int channel; +}; + +static u64_t cs_sp804_read(struct clocksource_t * cs) +{ + struct cs_sp804_pdata_t * pdat = (struct cs_sp804_pdata_t *)cs->priv; + return (u64_t)(0xffffffff - read32(pdat->virt + TIMER_VALUE(pdat->channel))); +} + +static struct device_t * cs_sp804_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct cs_sp804_pdata_t * pdat; + struct clocksource_t * cs; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + char * clk = dt_read_string(n, "clock-name", NULL); + int channel = dt_read_int(n, "timer-channel", -1); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x804) + return NULL; + + if(!search_clk(clk)) + return NULL; + + if(channel < 0 || channel > 1) + return NULL; + + pdat = malloc(sizeof(struct cs_sp804_pdata_t)); + if(!pdat) + return NULL; + + cs = malloc(sizeof(struct clocksource_t)); + if(!cs) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->clk = strdup(clk); + pdat->channel = channel; + + clk_enable(pdat->clk); + cs->name = alloc_device_name(dt_read_name(n), -1); + cs->mask = CLOCKSOURCE_MASK(32); + cs->shift = 20; + cs->mult = clocksource_hz2mult(clk_get_rate(pdat->clk), cs->shift); + cs->read = cs_sp804_read; + cs->priv = pdat; + + write32(pdat->virt + TIMER_CTRL(pdat->channel), 0); + write32(pdat->virt + TIMER_LOAD(pdat->channel), 0xffffffff); + write32(pdat->virt + TIMER_VALUE(pdat->channel), 0xffffffff); + write32(pdat->virt + TIMER_CTRL(pdat->channel), (1 << 1) | (1 << 6) | (1 << 7)); + + if(!(dev = register_clocksource(cs, drv))) + { + write32(pdat->virt + TIMER_CTRL(pdat->channel), 0); + clk_disable(pdat->clk); + free(pdat->clk); + free_device_name(cs->name); + free(cs->priv); + free(cs); + return NULL; + } + return dev; +} + +static void cs_sp804_remove(struct device_t * dev) +{ + struct clocksource_t * cs = (struct clocksource_t *)dev->priv; + struct cs_sp804_pdata_t * pdat = (struct cs_sp804_pdata_t *)cs->priv; + + if(cs) + { + unregister_clocksource(cs); + write32(pdat->virt + TIMER_CTRL(pdat->channel), 0); + clk_disable(pdat->clk); + free(pdat->clk); + free_device_name(cs->name); + free(cs->priv); + free(cs); + } +} + +static void cs_sp804_suspend(struct device_t * dev) +{ +} + +static void cs_sp804_resume(struct device_t * dev) +{ +} + +static struct driver_t cs_sp804 = { + .name = "cs-sp804", + .probe = cs_sp804_probe, + .remove = cs_sp804_remove, + .suspend = cs_sp804_suspend, + .resume = cs_sp804_resume, +}; + +static __init void cs_sp804_driver_init(void) +{ + register_driver(&cs_sp804); +} + +static __exit void cs_sp804_driver_exit(void) +{ + unregister_driver(&cs_sp804); +} + +driver_initcall(cs_sp804_driver_init); +driver_exitcall(cs_sp804_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/dma-pl08x.c b/src/arch/arm32/mach-versatile/driver/dma-pl08x.c new file mode 100755 index 0000000000000000000000000000000000000000..7b08ab6b23a6cedc4a82b66fa39d43f46abf0e86 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/dma-pl08x.c @@ -0,0 +1,515 @@ +/* + * driver/dma-pl08x.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include +#include +#include + +enum +{ + PL08X_INT_STATUS = 0x00, + PL08X_TC_STATUS = 0x04, + PL08X_TC_CLEAR = 0x08, + PL08X_ERR_STATUS = 0x0c, + PL08X_ERR_CLEAR = 0x10, + PL08X_RAW_TC_STATUS = 0x14, + PL08X_RAW_ERR_STATUS = 0x18, + PL08X_EN_CHAN = 0x1c, + PL08X_SOFT_BREQ = 0x20, + PL08X_SOFT_SREQ = 0x24, + PL08X_SOFT_LBREQ = 0x28, + PL08X_SOFT_LSREQ = 0x2c, + PL08X_CFG = 0x30, + PL08X_SYNC = 0x34, +}; + +#define PL08X_CH_SRC(x) ((0x100 + (x * 0x20))) +#define PL08X_CH_DST(x) ((0x104 + (x * 0x20))) +#define PL08X_CH_LLI(x) ((0x108 + (x * 0x20))) +#define PL08X_CH_CTL(x) ((0x10c + (x * 0x20))) +#define PL08X_CH_CFG(x) ((0x110 + (x * 0x20))) + +#define PL08X_CCTL_ITC (1 << 31) +#define PL08X_CCTL_PROT_CACHE (1 << 30) +#define PL08X_CCTL_PROT_BUFF (1 << 29) +#define PL08X_CCTL_PROT_SYS (1 << 28) +#define PL08X_CCTL_DI (1 << 27) +#define PL08X_CCTL_SI (1 << 26) +#define PL08X_CCTL_DWIDTH(x) (((x) & 0x7) << 21) +#define PL08X_CCTL_SWIDTH(x) (((x) & 0x7) << 18) +#define PL08X_CCTL_DBSIZE(x) (((x) & 0x7) << 15) +#define PL08X_CCTL_SBSIZE(x) (((x) & 0x7) << 12) +#define PL08X_CCTL_TSIZE(x) (((x) & 0xfff) << 0) + +#define PL08X_WIDTH_8 (0x0) +#define PL08X_WIDTH_16 (0x1) +#define PL08X_WIDTH_32 (0x2) + +#define PL08X_BSIZE_1 (0x0) +#define PL08X_BSIZE_4 (0x1) +#define PL08X_BSIZE_8 (0x2) +#define PL08X_BSIZE_16 (0x3) +#define PL08X_BSIZE_32 (0x4) +#define PL08X_BSIZE_64 (0x5) +#define PL08X_BSIZE_128 (0x6) +#define PL08X_BSIZE_256 (0x7) + +#define PL08X_CCFG_HALT (1 << 18) +#define PL08X_CCFG_ACTIVE (1 << 17) +#define PL08X_CCFG_LOCK (1 << 16) +#define PL08X_CCFG_ITC (1 << 15) +#define PL08X_CCFG_IE (1 << 14) +#define PL08X_CCFG_FLOW(x) (((x) & 0x7) << 11) +#define PL08X_CCFG_DST(x) (((x) & 0xf) << 6) +#define PL08X_CCFG_SRC(x) (((x) & 0xf) << 1) +#define PL08X_CCFG_EN (1 << 0) + +#define PL08X_FLOW_MEM2MEM (0x0) +#define PL08X_FLOW_MEM2PER (0x1) +#define PL08X_FLOW_PER2MEM (0x2) +#define PL08X_FLOW_SRC2DST (0x3) +#define PL08X_FLOW_SRC2DST_DST (0x4) +#define PL08X_FLOW_MEM2PER_PER (0x5) +#define PL08X_FLOW_PER2MEM_PER (0x6) +#define PL08X_FLOW_SRC2DST_SRC (0x7) + +struct dma_pl08x_pdata_t +{ + virtual_addr_t virt; + char * clk; + int irq; + int reset; + int base; + int ndma; + int tsize; +}; + +static u32_t get_pl08x_ctl(struct dma_channel_t * ch, int tsize) +{ + u32_t ctl; + int size; + + size = min(tsize, ch->size - ch->len) / (1 << DMA_G_SRC_WIDTH(ch->flag)); + ctl = PL08X_CCTL_ITC | PL08X_CCTL_TSIZE(size); + switch(DMA_G_SRC_INC(ch->flag)) + { + case DMA_INCREASE: + ctl |= PL08X_CCTL_SI; + break; + case DMA_CONSTANT: + default: + break; + } + switch(DMA_G_DST_INC(ch->flag)) + { + case DMA_INCREASE: + ctl |= PL08X_CCTL_DI; + break; + case DMA_CONSTANT: + default: + break; + } + switch(DMA_G_SRC_WIDTH(ch->flag)) + { + case DMA_WIDTH_8BIT: + ctl |= PL08X_CCTL_SWIDTH(PL08X_WIDTH_8); + break; + case DMA_WIDTH_16BIT: + ctl |= PL08X_CCTL_SWIDTH(PL08X_WIDTH_16); + break; + case DMA_WIDTH_32BIT: + ctl |= PL08X_CCTL_SWIDTH(PL08X_WIDTH_32); + break; + case DMA_WIDTH_64BIT: + default: + break; + } + switch(DMA_G_DST_WIDTH(ch->flag)) + { + case DMA_WIDTH_8BIT: + ctl |= PL08X_CCTL_DWIDTH(PL08X_WIDTH_8); + break; + case DMA_WIDTH_16BIT: + ctl |= PL08X_CCTL_DWIDTH(PL08X_WIDTH_16); + break; + case DMA_WIDTH_32BIT: + ctl |= PL08X_CCTL_DWIDTH(PL08X_WIDTH_32); + break; + case DMA_WIDTH_64BIT: + default: + break; + } + switch(DMA_G_SRC_BURST(ch->flag)) + { + case DMA_BURST_SIZE_1: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_1); + break; + case DMA_BURST_SIZE_4: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_4); + break; + case DMA_BURST_SIZE_8: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_8); + break; + case DMA_BURST_SIZE_16: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_16); + break; + case DMA_BURST_SIZE_32: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_32); + break; + case DMA_BURST_SIZE_64: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_64); + break; + case DMA_BURST_SIZE_128: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_128); + break; + case DMA_BURST_SIZE_256: + ctl |= PL08X_CCTL_SBSIZE(PL08X_BSIZE_256); + break; + case DMA_BURST_SIZE_512: + case DMA_BURST_SIZE_1024: + case DMA_BURST_SIZE_2048: + case DMA_BURST_SIZE_4096: + case DMA_BURST_SIZE_8192: + case DMA_BURST_SIZE_16384: + case DMA_BURST_SIZE_32768: + case DMA_BURST_SIZE_65536: + default: + break; + } + switch(DMA_G_DST_BURST(ch->flag)) + { + case DMA_BURST_SIZE_1: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_1); + break; + case DMA_BURST_SIZE_4: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_4); + break; + case DMA_BURST_SIZE_8: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_8); + break; + case DMA_BURST_SIZE_16: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_16); + break; + case DMA_BURST_SIZE_32: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_32); + break; + case DMA_BURST_SIZE_64: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_64); + break; + case DMA_BURST_SIZE_128: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_128); + break; + case DMA_BURST_SIZE_256: + ctl |= PL08X_CCTL_DBSIZE(PL08X_BSIZE_256); + break; + case DMA_BURST_SIZE_512: + case DMA_BURST_SIZE_1024: + case DMA_BURST_SIZE_2048: + case DMA_BURST_SIZE_4096: + case DMA_BURST_SIZE_8192: + case DMA_BURST_SIZE_16384: + case DMA_BURST_SIZE_32768: + case DMA_BURST_SIZE_65536: + default: + break; + } + return ctl; +} + +static u32_t get_pl08x_cfg(struct dma_channel_t * ch) +{ + u32_t cfg; + + cfg = PL08X_CCFG_ITC | PL08X_CCFG_IE | PL08X_CCFG_DST(DMA_G_DST_PORT(ch->flag)) | PL08X_CCFG_SRC(DMA_G_SRC_PORT(ch->flag)); + switch(DMA_G_TYPE(ch->flag)) + { + case DMA_TYPE_MEMTOMEM: + cfg |= PL08X_CCFG_FLOW(PL08X_FLOW_MEM2MEM); + break; + case DMA_TYPE_MEMTODEV: + cfg |= PL08X_CCFG_FLOW(PL08X_FLOW_MEM2PER); + break; + case DMA_TYPE_DEVTOMEM: + cfg |= PL08X_CCFG_FLOW(PL08X_FLOW_PER2MEM); + break; + case DMA_TYPE_DEVTODEV: + cfg |= PL08X_CCFG_FLOW(PL08X_FLOW_SRC2DST); + break; + default: + break; + } + return cfg; +} + +static void dma_pl08x_start(struct dmachip_t * chip, int offset) +{ + struct dma_pl08x_pdata_t * pdat = (struct dma_pl08x_pdata_t *)chip->priv; + struct dma_channel_t * ch; + + if(offset >= chip->ndma) + return; + + ch = &chip->channel[offset]; + while(read32(pdat->virt + PL08X_EN_CHAN) & (1 << offset)); + while(read32(pdat->virt + PL08X_CH_CFG(offset)) & (PL08X_CCFG_ACTIVE | PL08X_CCFG_EN)); + smp_mb(); + write32(pdat->virt + PL08X_CH_SRC(offset), (u32_t)(ch->src + ch->len)); + write32(pdat->virt + PL08X_CH_DST(offset), (u32_t)(ch->dst + ch->len)); + write32(pdat->virt + PL08X_CH_LLI(offset), 0); + write32(pdat->virt + PL08X_CH_CTL(offset), get_pl08x_ctl(ch, pdat->tsize)); + write32(pdat->virt + PL08X_CH_CFG(offset), get_pl08x_cfg(ch)); + write32(pdat->virt + PL08X_CH_CFG(offset), read32(pdat->virt + PL08X_CH_CFG(offset)) | PL08X_CCFG_EN); + write32(pdat->virt + PL08X_CFG, read32(pdat->virt + PL08X_CFG) | (1 << 0)); + smp_mb(); +} + +static void dma_pl08x_stop(struct dmachip_t * chip, int offset) +{ + struct dma_pl08x_pdata_t * pdat = (struct dma_pl08x_pdata_t *)chip->priv; + u32_t val; + + if(offset >= chip->ndma) + return; + + val = read32(pdat->virt + PL08X_CH_CFG(offset)); + val |= PL08X_CCFG_HALT; + write32(pdat->virt + PL08X_CH_CFG(offset), val); + + do { + val = read32(pdat->virt + PL08X_CH_CFG(offset)); + } while(val & PL08X_CCFG_ACTIVE); + + smp_mb(); + val = read32(pdat->virt + PL08X_CH_CFG(offset)); + val &= ~PL08X_CCFG_EN; + write32(pdat->virt + PL08X_CH_CFG(offset), val); + smp_mb(); +} + +static int dma_pl08x_busying(struct dmachip_t * chip, int offset) +{ + struct dma_pl08x_pdata_t * pdat = (struct dma_pl08x_pdata_t *)chip->priv; + + if(offset < chip->ndma) + { + if(read32(pdat->virt + PL08X_EN_CHAN) & (1 << offset)) + return 1; + if((read32(pdat->virt + PL08X_CH_CFG(offset)) & (PL08X_CCFG_ACTIVE | PL08X_CCFG_EN))) + return 1; + } + return 0; +} + +static void dma_pl08x_interrupt(void * data) +{ + struct dmachip_t * chip = (struct dmachip_t *)data; + struct dma_pl08x_pdata_t * pdat = (struct dma_pl08x_pdata_t *)chip->priv; + struct dma_channel_t * ch; + u32_t err, tc; + int i; + + err = read32(pdat->virt + PL08X_ERR_STATUS); + if(err) + write32(pdat->virt + PL08X_ERR_CLEAR, err); + + tc = read32(pdat->virt + PL08X_TC_STATUS); + if(tc) + write32(pdat->virt + PL08X_TC_CLEAR, tc); + + if(err || tc) + { + for(i = 0; i < pdat->ndma; i++) + { + if(((1 << i) & err) || ((1 << i) & tc)) + { + ch = &chip->channel[i]; + ch->len += pdat->tsize; + if(ch->len < ch->size) + { + while(read32(pdat->virt + PL08X_EN_CHAN) & (1 << i)); + while(read32(pdat->virt + PL08X_CH_CFG(i)) & (PL08X_CCFG_ACTIVE | PL08X_CCFG_EN)); + smp_mb(); + write32(pdat->virt + PL08X_CH_SRC(i), (u32_t)(ch->src + ch->len)); + write32(pdat->virt + PL08X_CH_DST(i), (u32_t)(ch->dst + ch->len)); + write32(pdat->virt + PL08X_CH_LLI(i), 0); + write32(pdat->virt + PL08X_CH_CTL(i), get_pl08x_ctl(ch, pdat->tsize)); + write32(pdat->virt + PL08X_CH_CFG(i), get_pl08x_cfg(ch)); + write32(pdat->virt + PL08X_CH_CFG(i), read32(pdat->virt + PL08X_CH_CFG(i)) | PL08X_CCFG_EN); + write32(pdat->virt + PL08X_CFG, read32(pdat->virt + PL08X_CFG) | (1 << 0)); + smp_mb(); + } + else + { + while(read32(pdat->virt + PL08X_EN_CHAN) & (1 << i)); + while(read32(pdat->virt + PL08X_CH_CFG(i)) & (PL08X_CCFG_ACTIVE | PL08X_CCFG_EN)); + smp_mb(); + write32(pdat->virt + PL08X_CH_CFG(i), read32(pdat->virt + PL08X_CH_CFG(i)) & ~PL08X_CCFG_EN); + smp_mb(); + if(ch->complete) + ch->complete(ch->data); + } + } + } + } +} + +static struct device_t * dma_pl08x_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct dma_pl08x_pdata_t * pdat; + struct dmachip_t * chip; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + char * clk = dt_read_string(n, "clock-name", NULL); + int irq = dt_read_int(n, "interrupt", -1); + int base = dt_read_int(n, "dma-base", -1); + int ndma = dt_read_int(n, "dma-count", -1); + int i; + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + + if(((id >> 12) & 0xff) != 0x41 || ((id & 0xfff) != 0x080 && (id & 0xfff) != 0x081)) + return NULL; + + if(!search_clk(clk)) + return NULL; + + if(!irq_is_valid(irq)) + return NULL; + + if((base < 0) || (ndma <= 0)) + return NULL; + + pdat = malloc(sizeof(struct dma_pl08x_pdata_t)); + if(!pdat) + return NULL; + + chip = malloc(sizeof(struct dmachip_t)); + if(!chip) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->clk = strdup(clk); + pdat->reset = dt_read_int(n, "reset", -1); + pdat->irq = irq; + pdat->base = base; + pdat->ndma = ndma; + pdat->tsize = 1024; + + chip->name = alloc_device_name(dt_read_name(n), -1); + chip->base = pdat->base; + chip->ndma = pdat->ndma; + chip->channel = malloc(sizeof(struct dma_channel_t) * pdat->ndma); + chip->start = dma_pl08x_start; + chip->stop = dma_pl08x_stop; + chip->busying = dma_pl08x_busying; + chip->priv = pdat; + + clk_enable(pdat->clk); + if(pdat->reset >= 0) + reset_deassert(pdat->reset); + request_irq(pdat->irq, dma_pl08x_interrupt, IRQ_TYPE_NONE, chip); + write32(pdat->virt + PL08X_CFG, 0x0); + write32(pdat->virt + PL08X_TC_CLEAR, (1 << pdat->ndma) - 1); + write32(pdat->virt + PL08X_ERR_CLEAR, (1 << pdat->ndma) - 1); + write32(pdat->virt + PL08X_SYNC, 0x0); + for(i = 0; i < pdat->ndma; i++) + { + write32(pdat->virt + PL08X_CH_SRC(i), 0); + write32(pdat->virt + PL08X_CH_DST(i), 0); + write32(pdat->virt + PL08X_CH_LLI(i), 0); + write32(pdat->virt + PL08X_CH_CTL(i), 0); + write32(pdat->virt + PL08X_CH_CFG(i), 0); + } + + if(!(dev = register_dmachip(chip, drv))) + { + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(chip->name); + free(chip->channel); + free(chip->priv); + free(chip); + return NULL; + } + return dev; +} + +static void dma_pl08x_remove(struct device_t * dev) +{ + struct dmachip_t * chip = (struct dmachip_t *)dev->priv; + struct dma_pl08x_pdata_t * pdat = (struct dma_pl08x_pdata_t *)chip->priv; + + if(chip) + { + unregister_dmachip(chip); + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(chip->name); + free(chip->channel); + free(chip->priv); + free(chip); + } +} + +static void dma_pl08x_suspend(struct device_t * dev) +{ +} + +static void dma_pl08x_resume(struct device_t * dev) +{ +} + +static struct driver_t dma_pl08x = { + .name = "dma-pl08x", + .probe = dma_pl08x_probe, + .remove = dma_pl08x_remove, + .suspend = dma_pl08x_suspend, + .resume = dma_pl08x_resume, +}; + +static __init void dma_pl08x_driver_init(void) +{ + register_driver(&dma_pl08x); +} + +static __exit void dma_pl08x_driver_exit(void) +{ + unregister_driver(&dma_pl08x); +} + +driver_initcall(dma_pl08x_driver_init); +driver_exitcall(dma_pl08x_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/fb-pl110.c b/src/arch/arm32/mach-versatile/driver/fb-pl110.c new file mode 100755 index 0000000000000000000000000000000000000000..f4bcaeaec6db4b8bd144e68eaa2ac9cb9d12a3f5 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/fb-pl110.c @@ -0,0 +1,243 @@ +/* + * driver/fb-pl110.c + * + * Copyright(c) 2007-2021 Kevin.Zhao + * Based on arch/arm32/mach-realview/driver/fb-pl111.c by Jianjun Jiang <8192542@qq.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include +#include + +enum { + CLCD_TIM0 = 0x000, + CLCD_TIM1 = 0x004, + CLCD_TIM2 = 0x008, + CLCD_TIM3 = 0x00c, + CLCD_UBAS = 0x010, + CLCD_LBAS = 0x014, + CLCD_CNTL = 0x018, + CLCD_IMSC = 0x01c, + CLCD_RIS = 0x020, + CLCD_MIS = 0x024, + CLCD_ICR = 0x028, + CLCD_UCUR = 0x02c, + CLCD_LCUR = 0x030, +}; + +struct fb_pl110_pdata_t { + virtual_addr_t virt; + int width; + int height; + int pwidth; + int pheight; + int hfp; + int hbp; + int hsl; + int vfp; + int vbp; + int vsl; + int pixlen; + int index; + void * vram[2]; + struct region_list_t * nrl, * orl; + struct led_t * backlight; + int brightness; +}; + +static void fb_setbl(struct framebuffer_t * fb, int brightness) +{ + struct fb_pl110_pdata_t * pdat = (struct fb_pl110_pdata_t *)fb->priv; + led_set_brightness(pdat->backlight, brightness); +} + +static int fb_getbl(struct framebuffer_t * fb) +{ + struct fb_pl110_pdata_t * pdat = (struct fb_pl110_pdata_t *)fb->priv; + return led_get_brightness(pdat->backlight); +} + +static struct surface_t * fb_create(struct framebuffer_t * fb) +{ + struct fb_pl110_pdata_t * pdat = (struct fb_pl110_pdata_t *)fb->priv; + return surface_alloc(pdat->width, pdat->height, NULL); +} + +static void fb_destroy(struct framebuffer_t * fb, struct surface_t * s) +{ + surface_free(s); +} + +static void fb_present(struct framebuffer_t * fb, struct surface_t * s, struct region_list_t * rl) +{ + struct fb_pl110_pdata_t * pdat = (struct fb_pl110_pdata_t *)fb->priv; + struct region_list_t * nrl = pdat->nrl; + + region_list_clear(nrl); + region_list_merge(nrl, pdat->orl); + region_list_merge(nrl, rl); + region_list_clone(pdat->orl, rl); + + pdat->index = (pdat->index + 1) & 0x1; + if(nrl->count > 0) + present_surface(pdat->vram[pdat->index], s, nrl); + else + memcpy(pdat->vram[pdat->index], s->pixels, s->pixlen); + dma_cache_sync(pdat->vram[pdat->index], pdat->pixlen, DMA_TO_DEVICE); + write32(pdat->virt + CLCD_UBAS, ((u32_t)pdat->vram[pdat->index])); + write32(pdat->virt + CLCD_LBAS, ((u32_t)pdat->vram[pdat->index] + pdat->pixlen)); +} + +static struct device_t * fb_pl110_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct fb_pl110_pdata_t * pdat; + struct framebuffer_t * fb; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x110) + return NULL; + + pdat = malloc(sizeof(struct fb_pl110_pdata_t)); + if(!pdat) + return NULL; + + fb = malloc(sizeof(struct framebuffer_t)); + if(!fb) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->width = dt_read_int(n, "width", 640); + pdat->height = dt_read_int(n, "height", 480); + pdat->pwidth = dt_read_int(n, "physical-width", 216); + pdat->pheight = dt_read_int(n, "physical-height", 135); + pdat->hfp = dt_read_int(n, "hfront-porch", 1); + pdat->hbp = dt_read_int(n, "hback-porch", 1); + pdat->hsl = dt_read_int(n, "hsync-len", 1); + pdat->vfp = dt_read_int(n, "vfront-porch", 1); + pdat->vbp = dt_read_int(n, "vback-porch", 1); + pdat->vsl = dt_read_int(n, "vsync-len", 1); + pdat->pixlen = pdat->width * pdat->height * 4; + pdat->index = 0; + pdat->vram[0] = dma_alloc_noncoherent(pdat->pixlen); + pdat->vram[1] = dma_alloc_noncoherent(pdat->pixlen); + pdat->nrl = region_list_alloc(0); + pdat->orl = region_list_alloc(0); + pdat->backlight = search_led(dt_read_string(n, "backlight", NULL)); + + fb->name = alloc_device_name(dt_read_name(n), -1); + fb->width = pdat->width; + fb->height = pdat->height; + fb->pwidth = pdat->pwidth; + fb->pheight = pdat->pheight; + fb->setbl = fb_setbl; + fb->getbl = fb_getbl; + fb->create = fb_create; + fb->destroy = fb_destroy; + fb->present = fb_present; + fb->priv = pdat; + + write32(pdat->virt + CLCD_TIM0, (pdat->hbp<<24) | (pdat->hfp<<16) | (pdat->hsl<<8) | ((pdat->width/16-1)<<2)); + write32(pdat->virt + CLCD_TIM1, (pdat->vbp<<24) | (pdat->vfp<<16) | (pdat->vsl<<10) | ((pdat->height-1)<<0)); + write32(pdat->virt + CLCD_TIM2, (1<<26) | ((pdat->width/16-1)<<16) | (1<<5) | (1<<0)); + write32(pdat->virt + CLCD_TIM3, (0<<0)); + write32(pdat->virt + CLCD_IMSC, 0x0); + write32(pdat->virt + CLCD_CNTL, (5 << 1) | (1 << 5) | (1 << 8)); + write32(pdat->virt + CLCD_CNTL, (read32(pdat->virt + CLCD_CNTL) | (1 << 0) | (1 << 11))); + + if(!(dev = register_framebuffer(fb, drv))) + { + dma_free_noncoherent(pdat->vram[0]); + dma_free_noncoherent(pdat->vram[1]); + region_list_free(pdat->nrl); + region_list_free(pdat->orl); + free_device_name(fb->name); + free(fb->priv); + free(fb); + return NULL; + } + return dev; +} + +static void fb_pl110_remove(struct device_t * dev) +{ + struct framebuffer_t * fb = (struct framebuffer_t *)dev->priv; + struct fb_pl110_pdata_t * pdat = (struct fb_pl110_pdata_t *)fb->priv; + + if(fb) + { + unregister_framebuffer(fb); + dma_free_noncoherent(pdat->vram[0]); + dma_free_noncoherent(pdat->vram[1]); + region_list_free(pdat->nrl); + region_list_free(pdat->orl); + free_device_name(fb->name); + free(fb->priv); + free(fb); + } +} + +static void fb_pl110_suspend(struct device_t * dev) +{ + struct framebuffer_t * fb = (struct framebuffer_t *)dev->priv; + struct fb_pl110_pdata_t * pdat = (struct fb_pl110_pdata_t *)fb->priv; + + pdat->brightness = led_get_brightness(pdat->backlight); + led_set_brightness(pdat->backlight, 0); +} + +static void fb_pl110_resume(struct device_t * dev) +{ + struct framebuffer_t * fb = (struct framebuffer_t *)dev->priv; + struct fb_pl110_pdata_t * pdat = (struct fb_pl110_pdata_t *)fb->priv; + + led_set_brightness(pdat->backlight, pdat->brightness); +} + +static struct driver_t fb_pl110 = { + .name = "fb-pl110", + .probe = fb_pl110_probe, + .remove = fb_pl110_remove, + .suspend = fb_pl110_suspend, + .resume = fb_pl110_resume, +}; + +static __init void fb_pl110_driver_init(void) +{ + register_driver(&fb_pl110); +} + +static __exit void fb_pl110_driver_exit(void) +{ + unregister_driver(&fb_pl110); +} + +driver_initcall(fb_pl110_driver_init); +driver_exitcall(fb_pl110_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/gpio-pl061.c b/src/arch/arm32/mach-versatile/driver/gpio-pl061.c new file mode 100755 index 0000000000000000000000000000000000000000..b31750afb01cf7689e8dfe4cb90675ce3c446d3d --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/gpio-pl061.c @@ -0,0 +1,252 @@ +/* + * driver/gpio-pl061.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include + +enum { + GPIO_DIR = 0x400, + GPIO_IS = 0x404, + GPIO_IBE = 0x408, + GPIO_IEV = 0x40C, + GPIO_IE = 0x410, + GPIO_RIS = 0x414, + GPIO_MIS = 0x418, + GPIO_IC = 0x41C, +}; + +struct gpio_pl061_pdata_t +{ + virtual_addr_t virt; + int base; + int ngpio; + int oirq; +}; + +static void gpio_pl061_set_cfg(struct gpiochip_t * chip, int offset, int cfg) +{ +} + +static int gpio_pl061_get_cfg(struct gpiochip_t * chip, int offset) +{ + return 0; +} + +static void gpio_pl061_set_pull(struct gpiochip_t * chip, int offset, enum gpio_pull_t pull) +{ +} + +static enum gpio_pull_t gpio_pl061_get_pull(struct gpiochip_t * chip, int offset) +{ + return GPIO_PULL_NONE; +} + +static void gpio_pl061_set_drv(struct gpiochip_t * chip, int offset, enum gpio_drv_t drv) +{ +} + +static enum gpio_drv_t gpio_pl061_get_drv(struct gpiochip_t * chip, int offset) +{ + return GPIO_DRV_WEAK; +} + +static void gpio_pl061_set_rate(struct gpiochip_t * chip, int offset, enum gpio_rate_t rate) +{ +} + +static enum gpio_rate_t gpio_pl061_get_rate(struct gpiochip_t * chip, int offset) +{ + return GPIO_RATE_SLOW; +} + +static void gpio_pl061_set_dir(struct gpiochip_t * chip, int offset, enum gpio_direction_t dir) +{ + struct gpio_pl061_pdata_t * pdat = (struct gpio_pl061_pdata_t *)chip->priv; + u8_t val; + + if(offset >= chip->ngpio) + return; + + switch(dir) + { + case GPIO_DIRECTION_INPUT: + val = read8(pdat->virt + GPIO_DIR); + val &= ~(1 << offset); + write8(pdat->virt + GPIO_DIR, val); + break; + + case GPIO_DIRECTION_OUTPUT: + val = read8(pdat->virt + GPIO_DIR); + val |= 1 << offset; + write8(pdat->virt + GPIO_DIR, val); + break; + + default: + break; + } +} + +static enum gpio_direction_t gpio_pl061_get_dir(struct gpiochip_t * chip, int offset) +{ + struct gpio_pl061_pdata_t * pdat = (struct gpio_pl061_pdata_t *)chip->priv; + u8_t val; + + if(offset >= chip->ngpio) + return GPIO_DIRECTION_INPUT; + + val = read8(pdat->virt + GPIO_DIR); + if((val & (1 << offset)) == 0) + return GPIO_DIRECTION_INPUT; + return GPIO_DIRECTION_OUTPUT; +} + +static void gpio_pl061_set_value(struct gpiochip_t * chip, int offset, int value) +{ + struct gpio_pl061_pdata_t * pdat = (struct gpio_pl061_pdata_t *)chip->priv; + write8(pdat->virt + (1 << (offset + 2)), !!value << offset); +} + +static int gpio_pl061_get_value(struct gpiochip_t * chip, int offset) +{ + struct gpio_pl061_pdata_t * pdat = (struct gpio_pl061_pdata_t *)chip->priv; + return !!read8(pdat->virt + (1 << (offset + 2))); +} + +static int gpio_pl061_to_irq(struct gpiochip_t * chip, int offset) +{ + struct gpio_pl061_pdata_t * pdat = (struct gpio_pl061_pdata_t *)chip->priv; + + if((offset >= chip->ngpio) || (pdat->oirq < 0)) + return -1; + return pdat->oirq + offset; +} + +static struct device_t * gpio_pl061_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct gpio_pl061_pdata_t * pdat; + struct gpiochip_t * chip; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + int base = dt_read_int(n, "gpio-base", -1); + int ngpio = dt_read_int(n, "gpio-count", -1); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x061) + return NULL; + + if((base < 0) || (ngpio <= 0)) + return NULL; + + pdat = malloc(sizeof(struct gpio_pl061_pdata_t)); + if(!pdat) + return NULL; + + chip = malloc(sizeof(struct gpiochip_t)); + if(!chip) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->base = base; + pdat->ngpio = ngpio; + pdat->oirq = dt_read_int(n, "interrupt-offset", -1); + + chip->name = alloc_device_name(dt_read_name(n), -1); + chip->base = pdat->base; + chip->ngpio = pdat->ngpio; + chip->set_cfg = gpio_pl061_set_cfg; + chip->get_cfg = gpio_pl061_get_cfg; + chip->set_pull = gpio_pl061_set_pull; + chip->get_pull = gpio_pl061_get_pull; + chip->set_drv = gpio_pl061_set_drv; + chip->get_drv = gpio_pl061_get_drv; + chip->set_rate = gpio_pl061_set_rate; + chip->get_rate = gpio_pl061_get_rate; + chip->set_dir = gpio_pl061_set_dir; + chip->get_dir = gpio_pl061_get_dir; + chip->set_value = gpio_pl061_set_value; + chip->get_value = gpio_pl061_get_value; + chip->to_irq = gpio_pl061_to_irq; + chip->priv = pdat; + + if(!(dev = register_gpiochip(chip, drv))) + { + free_device_name(chip->name); + free(chip->priv); + free(chip); + return NULL; + } + return dev; +} + +static void gpio_pl061_remove(struct device_t * dev) +{ + struct gpiochip_t * chip = (struct gpiochip_t *)dev->priv; + + if(chip) + { + unregister_gpiochip(chip); + free_device_name(chip->name); + free(chip->priv); + free(chip); + } +} + +static void gpio_pl061_suspend(struct device_t * dev) +{ +} + +static void gpio_pl061_resume(struct device_t * dev) +{ +} + +static struct driver_t gpio_pl061 = { + .name = "gpio-pl061", + .probe = gpio_pl061_probe, + .remove = gpio_pl061_remove, + .suspend = gpio_pl061_suspend, + .resume = gpio_pl061_resume, +}; + +static __init void gpio_pl061_driver_init(void) +{ + register_driver(&gpio_pl061); +} + +static __exit void gpio_pl061_driver_exit(void) +{ + unregister_driver(&gpio_pl061); +} + +driver_initcall(gpio_pl061_driver_init); +driver_exitcall(gpio_pl061_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/i2c-versatile.c b/src/arch/arm32/mach-versatile/driver/i2c-versatile.c new file mode 100755 index 0000000000000000000000000000000000000000..c035320237122fce1e2a0ad0aa48e65a03f16fd7 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/i2c-versatile.c @@ -0,0 +1,173 @@ +/* + * driver/i2c-versatile.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include + +/* + * Versatile i2c - I2C Controller On ARM Versatile Platform + * + * Optional properties: + * - delay-us: half clock cycle time in us + * 2 : fast-mode i2c - 400khz + * 5 : standard-mode i2c and smbus - 100khz + * 50 : slow-mode for smbus - 10khz + * + * Example: + * "i2c-versatile@0x10002000": { + * "delay-us": 5 + * } + */ + +#define I2C_CONTROL (0x00) +#define I2C_CONTROLS (0x00) +#define I2C_CONTROLC (0x04) +#define SCL (1 << 0) +#define SDA (1 << 1) + +struct i2c_versatile_pdata_t { + virtual_addr_t virt; + struct i2c_algo_bit_data_t bdat; +}; + +static void i2c_versatile_setsda(struct i2c_algo_bit_data_t * bdat, int state) +{ + struct i2c_versatile_pdata_t * pdat = (struct i2c_versatile_pdata_t *)bdat->priv; + write32(pdat->virt + (state ? I2C_CONTROLS : I2C_CONTROLC), SDA); +} + +static void i2c_versatile_setscl(struct i2c_algo_bit_data_t * bdat, int state) +{ + struct i2c_versatile_pdata_t * pdat = (struct i2c_versatile_pdata_t *)bdat->priv; + write32(pdat->virt + (state ? I2C_CONTROLS : I2C_CONTROLC), SCL); +} + +static int i2c_versatile_getsda(struct i2c_algo_bit_data_t * bdat) +{ + struct i2c_versatile_pdata_t * pdat = (struct i2c_versatile_pdata_t *)bdat->priv; + return !!(read32(pdat->virt + I2C_CONTROL) & SDA); +} + +static int i2c_versatile_getscl(struct i2c_algo_bit_data_t * bdat) +{ + struct i2c_versatile_pdata_t * pdat = (struct i2c_versatile_pdata_t *)bdat->priv; + return !!(read32(pdat->virt + I2C_CONTROL) & SCL); +} + +static int i2c_versatile_xfer(struct i2c_t * i2c, struct i2c_msg_t * msgs, int num) +{ + struct i2c_versatile_pdata_t * pdat = (struct i2c_versatile_pdata_t *)i2c->priv; + struct i2c_algo_bit_data_t * bdat = (struct i2c_algo_bit_data_t *)(&pdat->bdat); + return i2c_algo_bit_xfer(bdat, msgs, num); +} + +static struct device_t * i2c_versatile_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct i2c_versatile_pdata_t * pdat; + struct i2c_t * i2c; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + + pdat = malloc(sizeof(struct i2c_versatile_pdata_t)); + if(!pdat) + return NULL; + + i2c = malloc(sizeof(struct i2c_t)); + if(!i2c) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->bdat.setsda = i2c_versatile_setsda; + pdat->bdat.setscl = i2c_versatile_setscl; + pdat->bdat.getsda = i2c_versatile_getsda; + pdat->bdat.getscl = i2c_versatile_getscl; + pdat->bdat.udelay = dt_read_int(n, "delay-us", 5); + pdat->bdat.priv = pdat; + + i2c->name = alloc_device_name(dt_read_name(n), -1); + i2c->xfer = i2c_versatile_xfer; + i2c->priv = pdat; + + i2c_versatile_setsda(&pdat->bdat, 1); + i2c_versatile_setscl(&pdat->bdat, 1); + + if(!(dev = register_i2c(i2c, drv))) + { + free_device_name(i2c->name); + free(i2c->priv); + free(i2c); + return NULL; + } + return dev; +} + +static void i2c_versatile_remove(struct device_t * dev) +{ + struct i2c_t * i2c = (struct i2c_t *)dev->priv; + + if(i2c) + { + unregister_i2c(i2c); + free_device_name(i2c->name); + free(i2c->priv); + free(i2c); + } +} + +static void i2c_versatile_suspend(struct device_t * dev) +{ +} + +static void i2c_versatile_resume(struct device_t * dev) +{ +} + +static struct driver_t i2c_versatile = { + .name = "i2c-versatile", + .probe = i2c_versatile_probe, + .remove = i2c_versatile_remove, + .suspend = i2c_versatile_suspend, + .resume = i2c_versatile_resume, +}; + +static __init void i2c_versatile_driver_init(void) +{ + register_driver(&i2c_versatile); +} + +static __exit void i2c_versatile_driver_exit(void) +{ + unregister_driver(&i2c_versatile); +} + +driver_initcall(i2c_versatile_driver_init); +driver_exitcall(i2c_versatile_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/irq-pl190.c b/src/arch/arm32/mach-versatile/driver/irq-pl190.c new file mode 100755 index 0000000000000000000000000000000000000000..ea15761d0d346e536c4bf88a72889553a4c6a45e --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/irq-pl190.c @@ -0,0 +1,234 @@ +/* + * driver/irq-pl190.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include + +enum { + VIC_IRQSTATUS = 0x000, + VIC_FIQSTATUS = 0x004, + VIC_RAWINTR = 0x008, + VIC_INTSELECT = 0x00c, + VIC_INTENABLE = 0x010, + VIC_INTENCLEAR = 0x014, + VIC_SOFTINT = 0x018, + VIC_SOFTINTCLEAR = 0x01c, + VIC_PROTECTION = 0x020, + VIC_VECTADDR = 0x030, + VIC_DEFVECTADDR = 0x034, + VIC_VECTADDR0 = 0x100, + VIC_VECTCNTL0 = 0x200, +}; + +struct irq_pl190_pdata_t +{ + virtual_addr_t virt; + int base; + int nirq; +}; + +static void irq_pl190_enable(struct irqchip_t * chip, int offset) +{ + struct irq_pl190_pdata_t * pdat = (struct irq_pl190_pdata_t *)chip->priv; + write32(pdat->virt + VIC_INTENABLE, (read32(pdat->virt + VIC_INTENABLE) | (0x1 << offset))); +} + +static void irq_pl190_disable(struct irqchip_t * chip, int offset) +{ + struct irq_pl190_pdata_t * pdat = (struct irq_pl190_pdata_t *)chip->priv; + write32(pdat->virt + VIC_INTENCLEAR, (read32(pdat->virt + VIC_INTENCLEAR) | (0x1 << offset))); +} + +static void irq_pl190_settype(struct irqchip_t * chip, int offset, enum irq_type_t type) +{ +} + +static void irq_pl190_dispatch(struct irqchip_t * chip) +{ + struct irq_pl190_pdata_t * pdat = (struct irq_pl190_pdata_t *)chip->priv; + u32_t val = read32(pdat->virt + VIC_IRQSTATUS); + + if(val != 0) + { + u32_t offset = __ffs(val); + if((offset >= 0) && (offset < chip->nirq)) + { + (chip->handler[offset].func)(chip->handler[offset].data); + write32(pdat->virt + VIC_SOFTINTCLEAR, 0x1 << offset); + write32(pdat->virt + VIC_VECTADDR, 0); + } + } +} + +static void pl190_ctrl_init(virtual_addr_t virt) +{ + extern void irq(void); + int i; + + /* + * Disable protect mode + */ + write32(virt + VIC_PROTECTION, 0x00000000); + /* + * Select irq mode + */ + write32(virt + VIC_INTSELECT, 0x00000000); + /* + * Disable all interrupts + */ + write32(virt + VIC_INTENABLE, 0x00000000); + /* + * Clear all interrupts + */ + write32(virt + VIC_INTENCLEAR, 0xffffffff); + /* + * Clear all irq status + */ + write32(virt + VIC_IRQSTATUS, 0x00000000); + /* + * Clear all fiq status + */ + write32(virt + VIC_FIQSTATUS, 0x00000000); + /* + * Clear all software interrupts + */ + write32(virt + VIC_SOFTINTCLEAR, 0xffffffff); + /* + * Set vic address to zero + */ + write32(virt + VIC_VECTADDR, 0x00000000); + + write32(virt + VIC_DEFVECTADDR, (u32_t)irq); + for(i = 0; i < 32; i++) + write32(virt + VIC_VECTADDR0 + 4 * i, (u32_t)irq); + + for(i = 0; i < 32; i++) + write32(virt + VIC_VECTCNTL0 + 4 * i, (1 << 5) | (i << 0)); +} + +static struct device_t * irq_pl190_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct irq_pl190_pdata_t * pdat; + struct irqchip_t * chip; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + int base = dt_read_int(n, "interrupt-base", -1); + int nirq = dt_read_int(n, "interrupt-count", -1); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x190) + return NULL; + + if((base < 0) || (nirq <= 0)) + return NULL; + + pdat = malloc(sizeof(struct irq_pl190_pdata_t)); + if(!pdat) + return NULL; + + chip = malloc(sizeof(struct irqchip_t)); + if(!chip) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->base = base; + pdat->nirq = nirq; + + chip->name = alloc_device_name(dt_read_name(n), -1); + chip->base = pdat->base; + chip->nirq = pdat->nirq; + chip->handler = malloc(sizeof(struct irq_handler_t) * pdat->nirq); + chip->enable = irq_pl190_enable; + chip->disable = irq_pl190_disable; + chip->settype = irq_pl190_settype; + chip->dispatch = irq_pl190_dispatch; + chip->priv = pdat; + + pl190_ctrl_init(pdat->virt); + arm32_interrupt_enable(); + + if(!(dev = register_irqchip(chip, drv))) + { + free_device_name(chip->name); + free(chip->handler); + free(chip->priv); + free(chip); + return NULL; + } + return dev; +} + +static void irq_pl190_remove(struct device_t * dev) +{ + struct irqchip_t * chip = (struct irqchip_t *)dev->priv; + + if(chip) + { + unregister_irqchip(chip); + free_device_name(chip->name); + free(chip->handler); + free(chip->priv); + free(chip); + } +} + +static void irq_pl190_suspend(struct device_t * dev) +{ +} + +static void irq_pl190_resume(struct device_t * dev) +{ +} + +static struct driver_t irq_vic = { + .name = "irq-pl190", + .probe = irq_pl190_probe, + .remove = irq_pl190_remove, + .suspend = irq_pl190_suspend, + .resume = irq_pl190_resume, +}; + +static __init void irq_pl190_driver_init(void) +{ + register_driver(&irq_vic); +} + +static __exit void irq_pl190_driver_exit(void) +{ + unregister_driver(&irq_vic); +} + +driver_initcall(irq_pl190_driver_init); +driver_exitcall(irq_pl190_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/irq-sic.c b/src/arch/arm32/mach-versatile/driver/irq-sic.c new file mode 100755 index 0000000000000000000000000000000000000000..0038395097a84c4c6c042a85a525487e611f5b12 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/irq-sic.c @@ -0,0 +1,177 @@ +/* + * driver/irq-sic.c + * + * Copyright(c) 2007-2021 Kevin.Zhao + * Based on arch/arm32/mach-f1c100s/driver/irq-f1c100s-gpio.c by Jianjun Jiang <8192542@qq.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include + +#define IRQ_STATUS 0x00 +#define IRQ_RAW_STATUS 0x04 +#define IRQ_ENABLE_SET 0x08 +#define IRQ_ENABLE_CLEAR 0x0c +#define INT_SOFT_SET 0x10 +#define INT_SOFT_CLEAR 0x14 +#define PIC_ENABLES 0x20 /* set interrupt pass through bits */ +#define PIC_ENABLE_SET 0x20 +#define PIC_ENABLE_CLEAR 0x24 + +struct irq_sic_pdata_t { + virtual_addr_t virt; + int base; + int nirq; + int parent; +}; + +static void irq_sic_enable(struct irqchip_t * chip, int offset) +{ + struct irq_sic_pdata_t * pdat = (struct irq_sic_pdata_t *)chip->priv; + + write32(pdat->virt + IRQ_ENABLE_SET, (read32(pdat->virt + IRQ_ENABLE_SET) | (0x1 << offset))); +} + +static void irq_sic_disable(struct irqchip_t * chip, int offset) +{ + struct irq_sic_pdata_t * pdat = (struct irq_sic_pdata_t *)chip->priv; + write32(pdat->virt + IRQ_ENABLE_CLEAR, (read32(pdat->virt + IRQ_ENABLE_SET) | (0x1 << offset))); +} + +static void irq_sic_settype(struct irqchip_t * chip, int offset, enum irq_type_t type) +{ +} + +static void irq_sic_dispatch(struct irqchip_t * chip) +{ + struct irq_sic_pdata_t * pdat = (struct irq_sic_pdata_t *)chip->priv; + + u32_t pend = read32(pdat->virt + IRQ_STATUS); + + if(pend != 0) { + u32_t offset = __ffs(pend); + if((offset >= 0) && (offset < chip->nirq)) { + (chip->handler[offset].func)(chip->handler[offset].data); + } + } +} + +static struct device_t * irq_sic_probe(struct driver_t * drv, struct dtnode_t * n) { + struct irq_sic_pdata_t * pdat; + struct irqchip_t * chip; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + int base = dt_read_int(n, "interrupt-base", -1); + int nirq = dt_read_int(n, "interrupt-count", -1); + int parent = dt_read_int(n, "interrupt-parent", -1); + + if((base < 0) || (nirq <= 0) || !irq_is_valid(parent)) + return NULL; + + pdat = malloc(sizeof(struct irq_sic_pdata_t)); + if(!pdat) + return NULL; + + chip = malloc(sizeof(struct irqchip_t)); + if(!chip) { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->base = base; + pdat->nirq = nirq; + pdat->parent = parent; + + chip->name = alloc_device_name(dt_read_name(n), -1); + chip->base = pdat->base; + chip->nirq = pdat->nirq; + chip->handler = malloc(sizeof(struct irq_handler_t) * pdat->nirq); + chip->enable = irq_sic_enable; + chip->disable = irq_sic_disable; + chip->settype = irq_sic_settype; + chip->dispatch = irq_sic_dispatch; + chip->priv = pdat; + + /* Clear all pending interrupts */ + write32(virt + IRQ_ENABLE_CLEAR, 0xffffffff); + + /* + * On Versatile AB/PB, some secondary interrupts have a direct + * pass-thru to the primary controller for IRQs 20 and 22-31 which need + * to be enabled. See section 3.10 of the Versatile AB user guide. + */ + write32(virt + PIC_ENABLES, 0xffffffff); + + if(!(dev = register_sub_irqchip(pdat->parent, chip, drv))) { + free_device_name(chip->name); + free(chip->handler); + free(chip->priv); + free(chip); + return NULL; + } + return dev; +} + +static void irq_sic_remove(struct device_t * dev) +{ + struct irqchip_t * chip = (struct irqchip_t *)dev->priv; + struct irq_sic_pdata_t * pdat = (struct irq_sic_pdata_t *)chip->priv; + + if(chip) { + unregister_sub_irqchip(pdat->parent, chip); + free_device_name(chip->name); + free(chip->handler); + free(chip->priv); + free(chip); + } +} + +static void irq_sic_suspend(struct device_t * dev) +{ +} + +static void irq_sic_resume(struct device_t * dev) +{ +} + +static struct driver_t irq_sic = { + .name = "irq-sic", + .probe = irq_sic_probe, + .remove = irq_sic_remove, + .suspend = irq_sic_suspend, + .resume = irq_sic_resume, +}; + +static __init void irq_sic_driver_init(void) +{ + register_driver(&irq_sic); +} + +static __exit void irq_sic_driver_exit(void) +{ + unregister_driver(&irq_sic); +} + +driver_initcall(irq_sic_driver_init); +driver_exitcall(irq_sic_driver_exit); + diff --git a/src/arch/arm32/mach-versatile/driver/keyboard-pl050.c b/src/arch/arm32/mach-versatile/driver/keyboard-pl050.c new file mode 100755 index 0000000000000000000000000000000000000000..f1c5a9517720a6ee115d449cb7a7dbc6d5db28ea --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/keyboard-pl050.c @@ -0,0 +1,490 @@ +/* + * driver/keyboard-pl050.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include +#include +#include + +enum{ + KEYBOARD_CR = 0x00, + KEYBOARD_STAT = 0x04, + KEYBOARD_DATA = 0x08, + KEYBOARD_CLKDIV = 0x0c, + KEYBOARD_IIR = 0x10, +}; + +enum decode_state { + DECODE_STATE_MAKE_CODE, + DECODE_STATE_BREAK_CODE, + DECODE_STATE_LONG_MAKE_CODE, + DECODE_STATE_LONG_BREAK_CODE +}; + +struct keyboard_pl050_pdata_t +{ + virtual_addr_t virt; + char * clk; + int irq; + enum decode_state ds; + u32_t flag; +}; + +struct keymap { + u8_t data; + u32_t key; + u32_t caps_key; + u32_t shift_key; +}; + +enum key_value_t { + KEY_BUTTON_UP, + KEY_BUTTON_DOWN, +}; + +enum { + KBD_LEFT_SHIFT = (0x1 << 0), + KBD_RIGHT_SHIFT = (0x1 << 1), + KBD_LEFT_CTRL = (0x1 << 2), + KBD_RIGHT_CTRL = (0x1 << 3), + KBD_CAPS_LOCK = (0x1 << 6), + KBD_NUM_LOCK = (0x1 << 7), + KBD_SCROLL_LOCK = (0x1 << 8), +}; + +static const struct keymap map[] = { + /* code normal-key caps-key shift-key */ + {0x1c, KEY_a, KEY_A, KEY_A}, + {0x32, KEY_b, KEY_B, KEY_B}, + {0x21, KEY_c, KEY_C, KEY_C}, + {0x23, KEY_d, KEY_D, KEY_D}, + {0x24, KEY_e, KEY_E, KEY_E}, + {0x2b, KEY_f, KEY_F, KEY_F}, + {0x34, KEY_g, KEY_G, KEY_G}, + {0x33, KEY_h, KEY_H, KEY_H}, + {0x43, KEY_i, KEY_I, KEY_I}, + {0x3b, KEY_j, KEY_J, KEY_J}, + {0x42, KEY_k, KEY_K, KEY_K}, + {0x4b, KEY_l, KEY_L, KEY_L}, + {0x3a, KEY_m, KEY_M, KEY_M}, + {0x31, KEY_n, KEY_N, KEY_N}, + {0x44, KEY_o, KEY_O, KEY_O}, + {0x4d, KEY_p, KEY_P, KEY_P}, + {0x15, KEY_q, KEY_Q, KEY_Q}, + {0x2d, KEY_r, KEY_R, KEY_R}, + {0x1b, KEY_s, KEY_S, KEY_S}, + {0x2c, KEY_t, KEY_T, KEY_T}, + {0x3c, KEY_u, KEY_U, KEY_U}, + {0x2a, KEY_v, KEY_V, KEY_V}, + {0x1d, KEY_w, KEY_W, KEY_W}, + {0x22, KEY_x, KEY_X, KEY_X}, + {0x35, KEY_y, KEY_Y, KEY_Y}, + {0x1a, KEY_z, KEY_Z, KEY_Z}, + + {0x45, KEY_0, KEY_0, KEY_PARENTHESIS_RIGHT}, + {0x16, KEY_1, KEY_1, KEY_EXCLAMATION_MARK}, + {0x1e, KEY_2, KEY_2, KEY_AT}, + {0x26, KEY_3, KEY_3, KEY_POUNDSIGN}, + {0x25, KEY_4, KEY_4, KEY_DOLLAR}, + {0x2e, KEY_5, KEY_5, KEY_PERCENT}, + {0x36, KEY_6, KEY_6, KEY_CIRCUMFLEX_ACCENT}, + {0x3d, KEY_7, KEY_7, KEY_AMPERSAND}, + {0x3e, KEY_8, KEY_8, KEY_ASTERISK}, + {0x46, KEY_9, KEY_9, KEY_PARENTHESIS_LEFT}, + + {0x29, KEY_SPACE, KEY_SPACE, KEY_SPACE}, + {0x52, KEY_APOSTROPHE, KEY_APOSTROPHE, KEY_QUOTATION_MARK}, + {0x55, KEY_EQUAL, KEY_EQUAL, KEY_PLUS}, + {0x41, KEY_COMMA, KEY_COMMA, KEY_LESS_THAN}, + {0x4e, KEY_MINUS, KEY_MINUS, KEY_LOW_LINE}, + {0x49, KEY_FULL_STOP, KEY_FULL_STOP, KEY_GREATER_THAN}, + {0x4a, KEY_SOLIDUS, KEY_SOLIDUS, KEY_QUESTION_MARK}, + {0x4c, KEY_SEMICOLON, KEY_SEMICOLON, KEY_COLON}, + {0x54, KEY_SQUARE_BRACKET_LEFT, KEY_SQUARE_BRACKET_LEFT, KEY_CURLY_BRACKET_LEFT}, + {0x5d, KEY_REVERSE_SOLIDUS, KEY_REVERSE_SOLIDUS, KEY_VERTICAL_LINE}, + {0x5b, KEY_SQUARE_BRACKET_RIGHT, KEY_SQUARE_BRACKET_RIGHT, KEY_CURLY_BRACKET_RIGHT}, + {0x0e, KEY_GRAVE_ACCENT, KEY_GRAVE_ACCENT, KEY_TILDE}, + + {0x75, KEY_UP, KEY_UP, KEY_UP}, + {0x72, KEY_DOWN, KEY_DOWN, KEY_DOWN}, + {0x6b, KEY_LEFT, KEY_LEFT, KEY_LEFT}, + {0x74, KEY_RIGHT, KEY_RIGHT, KEY_RIGHT}, + {0x6c, KEY_VOLUME_DOWN, KEY_VOLUME_DOWN, KEY_VOLUME_DOWN}, + {0x69, KEY_VOLUME_UP, KEY_VOLUME_UP, KEY_VOLUME_UP}, + {0x76, KEY_HOME, KEY_HOME, KEY_HOME}, + {0x66, KEY_BACK, KEY_BACK, KEY_BACK}, + {0x0d, KEY_MENU, KEY_MENU, KEY_MENU}, + {0x5a, KEY_ENTER, KEY_ENTER, KEY_ENTER}, + + {0x37, KEY_POWER, KEY_POWER, KEY_POWER}, +}; + +static void keyboard_report_event(void * device, u32_t flag, u8_t data, enum key_value_t press) +{ + u32_t key; + u32_t i; + + for(i = 0; i < ARRAY_SIZE(map); i++) + { + if(map[i].data == data) + { + if( (flag & KBD_CAPS_LOCK) ) + key = map[i].caps_key; + else if( (flag & (KBD_LEFT_SHIFT | KBD_RIGHT_SHIFT)) ) + key = map[i].shift_key; + else if( (flag & (KBD_LEFT_CTRL | KBD_RIGHT_CTRL)) ) + key = 0; + else + key = map[i].key; + + if(key != 0) + { + if(press == KEY_BUTTON_DOWN) + push_event_key_down(device, key); + else if(press == KEY_BUTTON_UP) + push_event_key_up(device, key); + } + } + } +} + +static bool_t kmi_write(struct keyboard_pl050_pdata_t * pdat, u8_t value) +{ + int timeout = 1000; + + while((read8(pdat->virt + KEYBOARD_STAT) & (1 << 6)) == 0 && timeout--); + + if(timeout) + { + write8(pdat->virt + KEYBOARD_DATA, value); + while((read8(pdat->virt + KEYBOARD_STAT) & (1 << 4)) == 0); + + if(read8(pdat->virt + KEYBOARD_DATA) == 0xfa) + return TRUE; + } + return FALSE; +} + +static bool_t kmi_read(struct keyboard_pl050_pdata_t * pdat, u8_t * value) +{ + if((read8(pdat->virt + KEYBOARD_STAT) & (1 << 4))) + { + *value = read8(pdat->virt + KEYBOARD_DATA); + return TRUE; + } + return FALSE; +} + +static void keyboard_pl050_interrupt(void * data) +{ + struct input_t * input = (struct input_t *)data; + struct keyboard_pl050_pdata_t * pdat = (struct keyboard_pl050_pdata_t *)input->priv; + u8_t status = read8(pdat->virt + KEYBOARD_IIR); + u8_t value; + + while(status & (1 << 0)) + { + value = read8(pdat->virt + KEYBOARD_DATA); + + switch(pdat->ds) + { + case DECODE_STATE_MAKE_CODE: + /* break code */ + if(value == 0xf0) + { + pdat->ds = DECODE_STATE_BREAK_CODE; + } + /* long make code */ + else if(value == 0xe0) + { + pdat->ds = DECODE_STATE_LONG_MAKE_CODE; + } + else + { + pdat->ds = DECODE_STATE_MAKE_CODE; + + /* left shift */ + if(value == 0x12) + { + pdat->flag |= KBD_LEFT_SHIFT; + } + /* right shift */ + else if(value == 0x59) + { + pdat->flag |= KBD_RIGHT_SHIFT; + } + /* left ctrl */ + else if(value == 0x14) + { + pdat->flag |= KBD_LEFT_CTRL; + } + /* caps lock */ + else if(value == 0x58) + { + if(pdat->flag & KBD_CAPS_LOCK) + pdat->flag &= ~KBD_CAPS_LOCK; + else + pdat->flag |= KBD_CAPS_LOCK; + } + /* scroll lock */ + else if(value == 0x7e) + { + if(pdat->flag & KBD_SCROLL_LOCK) + pdat->flag &= ~KBD_SCROLL_LOCK; + else + pdat->flag |= KBD_SCROLL_LOCK; + } + /* num lock */ + else if(value == 0x77) + { + if(pdat->flag & KBD_NUM_LOCK) + pdat->flag &= ~KBD_NUM_LOCK; + else + pdat->flag |= KBD_NUM_LOCK; + } + /* others */ + else + { + keyboard_report_event(input, pdat->flag, value, KEY_BUTTON_DOWN); + } + } + break; + + case DECODE_STATE_BREAK_CODE: + if( (value != 0xf0) && (value != 0xe0)) + { + pdat->ds = DECODE_STATE_MAKE_CODE; + + /* left shift */ + if(value == 0x12) + { + pdat->flag &= ~KBD_LEFT_SHIFT; + } + /* right shift */ + else if(value == 0x59) + { + pdat->flag &= ~KBD_RIGHT_SHIFT; + } + /* left ctrl */ + else if(value == 0x14) + { + pdat->flag &= ~KBD_LEFT_CTRL; + } + /* others */ + else + { + keyboard_report_event(input, pdat->flag, value, KEY_BUTTON_UP); + } + } + else + { + pdat->ds = DECODE_STATE_BREAK_CODE; + } + break; + + case DECODE_STATE_LONG_MAKE_CODE: + if( value != 0xf0 && value!= 0xe0) + { + pdat->ds = DECODE_STATE_MAKE_CODE; + + /* left ctrl */ + if(value == 0x14) + { + pdat->flag |= KBD_RIGHT_CTRL; + } + /* others */ + else + { + keyboard_report_event(input, pdat->flag, value, KEY_BUTTON_DOWN); + } + } + else + { + pdat->ds = DECODE_STATE_LONG_BREAK_CODE; + } + break; + + case DECODE_STATE_LONG_BREAK_CODE: + if( (value != 0xf0) && (value != 0xe0)) + { + pdat->ds = DECODE_STATE_MAKE_CODE; + + /* left ctrl */ + if(value == 0x14) + { + pdat->flag &= ~KBD_RIGHT_CTRL; + } + /* others */ + else + { + keyboard_report_event(input, pdat->flag, value, KEY_BUTTON_UP); + } + } + else + { + pdat->ds = DECODE_STATE_LONG_BREAK_CODE; + } + break; + + default: + pdat->ds = DECODE_STATE_MAKE_CODE; + break; + } + + status = read8(pdat->virt + KEYBOARD_IIR); + } +} + +static int keyboard_pl050_ioctl(struct input_t * input, const char * cmd, void * arg) +{ + return -1; +} + +static struct device_t * keyboard_pl050_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct keyboard_pl050_pdata_t * pdat; + struct input_t * input; + struct device_t * dev; + virtual_addr_t virt = (dt_read_address(n)); + char * clk = dt_read_string(n, "clock-name", NULL); + int irq = dt_read_int(n, "interrupt", -1); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + u64_t rate; + u8_t value; + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x050) + return NULL; + + if(!search_clk(clk)) + return NULL; + + if(!irq_is_valid(irq)) + return NULL; + + pdat = malloc(sizeof(struct keyboard_pl050_pdata_t)); + if(!pdat) + return NULL; + + input = malloc(sizeof(struct input_t)); + if(!input) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->clk = strdup(clk); + pdat->irq = irq; + pdat->ds = DECODE_STATE_MAKE_CODE; + pdat->flag = KBD_NUM_LOCK; + + input->name = alloc_device_name(dt_read_name(n), -1); + input->ioctl = keyboard_pl050_ioctl; + input->priv = pdat; + + request_irq(pdat->irq, keyboard_pl050_interrupt, IRQ_TYPE_NONE, input); + clk_enable(pdat->clk); + rate = clk_get_rate(pdat->clk); + write8(pdat->virt + KEYBOARD_CLKDIV, (u32_t)(rate / 8000000) - 1); + write8(pdat->virt + KEYBOARD_CR, (1 << 2)); + kmi_read(pdat, &value); + kmi_write(pdat, 0xff); + kmi_read(pdat, &value); + kmi_write(pdat, 0xf3); + kmi_write(pdat, 0x2b); + kmi_write(pdat, 0xf0); + kmi_write(pdat, 0x02); + kmi_write(pdat, 0xfa); + kmi_write(pdat, 0xed); + kmi_write(pdat, 0x02); + write8(pdat->virt + KEYBOARD_CR, (1 << 2) | (1 << 4)); + + if(!(dev = register_input(input, drv))) + { + write8(pdat->virt + KEYBOARD_CR, 0); + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(input->name); + free(input->priv); + free(input); + return NULL; + } + return dev; +} + +static void keyboard_pl050_remove(struct device_t * dev) +{ + struct input_t * input = (struct input_t *)dev->priv; + struct keyboard_pl050_pdata_t * pdat = (struct keyboard_pl050_pdata_t *)input->priv; + + if(input) + { + unregister_input(input); + write8(pdat->virt + KEYBOARD_CR, 0); + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(input->name); + free(input->priv); + free(input); + } +} + +static void keyboard_pl050_suspend(struct device_t * dev) +{ +} + +static void keyboard_pl050_resume(struct device_t * dev) +{ +} + +static struct driver_t keyboard_pl050 = { + .name = "keyboard-pl050", + .probe = keyboard_pl050_probe, + .remove = keyboard_pl050_remove, + .suspend = keyboard_pl050_suspend, + .resume = keyboard_pl050_resume, +}; + +static __init void keyboard_pl050_driver_init(void) +{ + register_driver(&keyboard_pl050); +} + +static __exit void keyboard_pl050_driver_exit(void) +{ + unregister_driver(&keyboard_pl050); +} + +driver_initcall(keyboard_pl050_driver_init); +driver_exitcall(keyboard_pl050_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/mouse-pl050.c b/src/arch/arm32/mach-versatile/driver/mouse-pl050.c new file mode 100755 index 0000000000000000000000000000000000000000..f69e407e4ac611c9d2a8d9d6eb024d7ed0476d19 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/mouse-pl050.c @@ -0,0 +1,368 @@ +/* + * driver/mouse-pl050.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include +#include + +enum { + MOUSE_CR = 0x00, + MOUSE_STAT = 0x04, + MOUSE_DATA = 0x08, + MOUSE_CLKDIV = 0x0c, + MOUSE_IIR = 0x10, +}; + +struct mouse_pl050_pdata_t { + virtual_addr_t virt; + char * clk; + int irq; + int xmax, ymax; + int sensitivity; + int xpos, ypos; + int touchevent; + unsigned char packet[4]; + int index; + int obtn; +}; + +static bool_t kmi_write(struct mouse_pl050_pdata_t * pdat, u8_t value) +{ + int timeout = 1000; + + while((read8(pdat->virt + MOUSE_STAT) & (1 << 6)) == 0 && timeout--); + + if(timeout) + { + write8(pdat->virt + MOUSE_DATA, value); + while((read8(pdat->virt + MOUSE_STAT) & (1 << 4)) == 0); + + if(read8(pdat->virt + MOUSE_DATA) == 0xfa) + return TRUE; + } + return FALSE; +} + +static bool_t kmi_read(struct mouse_pl050_pdata_t * pdat, u8_t * value) +{ + if((read8(pdat->virt + MOUSE_STAT) & (1 << 4))) + { + *value = read8(pdat->virt + MOUSE_DATA); + return TRUE; + } + return FALSE; +} + +static void mouse_pl050_interrupt(void * data) +{ + struct input_t * input = (struct input_t *)data; + struct mouse_pl050_pdata_t * pdat = (struct mouse_pl050_pdata_t *)input->priv; + int x, y, relx, rely, delta; + int btndown, btnup, btn; + int status; + + status = read8(pdat->virt + MOUSE_IIR); + while(status & (1 << 0)) + { + pdat->packet[pdat->index] = read8(pdat->virt + MOUSE_DATA); + pdat->index = (pdat->index + 1) & 0x3; + + if(pdat->index == 0) + { + btn = pdat->packet[0] & 0x7; + btndown = (btn ^ pdat->obtn) & btn; + btnup = (btn ^ pdat->obtn) & pdat->obtn; + pdat->obtn = btn; + + if(pdat->packet[0] & 0x10) + relx = 0xffffff00 | pdat->packet[1]; + else + relx = pdat->packet[1]; + + if(pdat->packet[0] & 0x20) + rely = 0xffffff00 | pdat->packet[2]; + else + rely = pdat->packet[2]; + rely = -rely; + + delta = pdat->packet[3] & 0xf; + if(delta == 0xf) + delta = -1; + delta = -delta; + + if(relx != 0) + { + pdat->xpos = pdat->xpos + relx; + if(pdat->xpos < 0) + pdat->xpos = 0; + if(pdat->xpos > pdat->xmax - 1) + pdat->xpos = pdat->xmax - 1; + } + if(rely != 0) + { + pdat->ypos = pdat->ypos + rely; + if(pdat->ypos < 0) + pdat->ypos = 0; + if(pdat->ypos > pdat->ymax - 1) + pdat->ypos = pdat->ymax - 1; + } + x = pdat->xpos; + y = pdat->ypos; + + if(pdat->touchevent) + { + if((btn & (0x01 << 0)) && ((relx != 0) || (rely != 0))) + push_event_touch_move(input, x, y, 0); + + if(btndown & (0x01 << 0)) + push_event_touch_begin(input, x, y, 0); + + if(btnup & (0x01 << 0)) + push_event_touch_end(input, x, y, 0); + } + else + { + if((relx != 0) || (rely != 0)) + push_event_mouse_move(input, x, y); + + if(delta != 0) + push_event_mouse_wheel(input, 0, delta); + + if(btndown) + { + if(btndown & (0x01 << 0)) + push_event_mouse_button_down(input, x, y, MOUSE_BUTTON_LEFT); + else if(btndown & (0x01 << 1)) + push_event_mouse_button_down(input, x, y, MOUSE_BUTTON_RIGHT); + else if(btndown & (0x01 << 2)) + push_event_mouse_button_down(input, x, y, MOUSE_BUTTON_MIDDLE); + } + + if(btnup) + { + if(btnup & (0x01 << 0)) + push_event_mouse_button_up(input, x, y, MOUSE_BUTTON_LEFT); + else if(btnup & (0x01 << 1)) + push_event_mouse_button_up(input, x, y, MOUSE_BUTTON_RIGHT); + else if(btnup & (0x01 << 2)) + push_event_mouse_button_up(input, x, y, MOUSE_BUTTON_MIDDLE); + } + } + } + + status = read8(pdat->virt + MOUSE_IIR); + } +} + +static int mouse_pl050_ioctl(struct input_t * input, const char * cmd, void * arg) +{ + struct mouse_pl050_pdata_t * pdat = (struct mouse_pl050_pdata_t *)input->priv; + int * p = arg; + + switch(shash(cmd)) + { + case 0x431aa221: /* "mouse-set-range" */ + if(p) + { + pdat->xmax = p[0]; + pdat->ymax = p[1]; + return 0; + } + break; + case 0xcd455615: /* "mouse-get-range" */ + if(p) + { + p[0] = pdat->xmax; + p[1] = pdat->ymax; + return 0; + } + break; + case 0xe818d6df: /* "mouse-set-sensitivity" */ + if(p) + { + pdat->sensitivity = clamp(p[0], 1, 11); + return 0; + } + break; + case 0x40bfb1d3: /* "mouse-get-sensitivity" */ + if(p) + { + p[0] = pdat->sensitivity; + return 0; + } + break; + default: + break; + } + return -1; +} + +static struct device_t * mouse_pl050_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct mouse_pl050_pdata_t * pdat; + struct input_t * input; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + char * clk = dt_read_string(n, "clock-name", NULL); + int irq = dt_read_int(n, "interrupt", -1); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + u64_t rate; + u8_t value; + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x050) + return NULL; + + if(!search_clk(clk)) + return NULL; + + if(!irq_is_valid(irq)) + return NULL; + + pdat = malloc(sizeof(struct mouse_pl050_pdata_t)); + if(!pdat) + return NULL; + + input = malloc(sizeof(struct input_t)); + if(!input) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->clk = strdup(clk); + pdat->irq = irq; + pdat->xmax = dt_read_int(n, "pointer-range-x", 640); + pdat->ymax = dt_read_int(n, "pointer-range-y", 480); + pdat->sensitivity = dt_read_int(n, "pointer-sensitivity", 6); + pdat->touchevent = dt_read_bool(n, "simulate-touch-event", 0); + pdat->xpos = pdat->xmax / 2; + pdat->ypos = pdat->ymax / 2; + pdat->packet[0] = 0; + pdat->packet[1] = 0; + pdat->packet[2] = 0; + pdat->packet[3] = 0; + pdat->index = 0; + pdat->obtn = 0; + + input->name = alloc_device_name(dt_read_name(n), -1); + input->ioctl = mouse_pl050_ioctl; + input->priv = pdat; + + request_irq(pdat->irq, mouse_pl050_interrupt, IRQ_TYPE_NONE, input); + clk_enable(pdat->clk); + rate = clk_get_rate(pdat->clk); + write8(pdat->virt + MOUSE_CLKDIV, (u32_t)(rate / 8000000) - 1); + write8(pdat->virt + MOUSE_CR, (1 << 2)); + kmi_write(pdat, 0xff); + kmi_read(pdat, &value); + kmi_write(pdat, 0xf3); + kmi_write(pdat, 200); + kmi_write(pdat, 0xf3); + kmi_write(pdat, 100); + kmi_write(pdat, 0xf3); + kmi_write(pdat, 80); + kmi_write(pdat, 0xf2); + kmi_read(pdat, &value); + kmi_read(pdat, &value); + kmi_write(pdat, 0xf3); + kmi_write(pdat, 100); + kmi_write(pdat, 0xe8); + kmi_write(pdat, 0x02); + kmi_write(pdat, 0xe6); + kmi_write(pdat, 0xf4); + kmi_read(pdat, &value); + kmi_read(pdat, &value); + kmi_read(pdat, &value); + kmi_read(pdat, &value); + write8(pdat->virt + MOUSE_CR, (1 << 2) | (1 << 4)); + + if(!(dev = register_input(input, drv))) + { + write8(pdat->virt + MOUSE_CR, 0); + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(input->name); + free(input->priv); + free(input); + return NULL; + } + return dev; +} + +static void mouse_pl050_remove(struct device_t * dev) +{ + struct input_t * input = (struct input_t *)dev->priv; + struct mouse_pl050_pdata_t * pdat = (struct mouse_pl050_pdata_t *)input->priv; + + if(input) + { + unregister_input(input); + write8(pdat->virt + MOUSE_CR, 0); + clk_disable(pdat->clk); + free_irq(pdat->irq); + free(pdat->clk); + free_device_name(input->name); + free(input->priv); + free(input); + } +} + +static void mouse_pl050_suspend(struct device_t * dev) +{ +} + +static void mouse_pl050_resume(struct device_t * dev) +{ +} + +static struct driver_t mouse_pl050 = { + .name = "mouse-pl050", + .probe = mouse_pl050_probe, + .remove = mouse_pl050_remove, + .suspend = mouse_pl050_suspend, + .resume = mouse_pl050_resume, +}; + +static __init void mouse_pl050_driver_init(void) +{ + register_driver(&mouse_pl050); +} + +static __exit void mouse_pl050_driver_exit(void) +{ + unregister_driver(&mouse_pl050); +} + +driver_initcall(mouse_pl050_driver_init); +driver_exitcall(mouse_pl050_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/rtc-ds1338.c b/src/arch/arm32/mach-versatile/driver/rtc-ds1338.c new file mode 100755 index 0000000000000000000000000000000000000000..d9428980892829404bb8bc6bf1b0d26123bbb3dd --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/rtc-ds1338.c @@ -0,0 +1,279 @@ +/* + * driver/rtc-ds1338.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include + +/* + * Dallas DS1338 - I2C Serial Real-Time Clock + * + * Required properties: + * - i2c-bus: i2c bus name which device attched + * + * Optional properties: + * - square-wave-output: the frequency of square wave on SQW/OUT pin + * values usable for ds1338 are: + * -1 : high level + * 0 : low level + * 1 : 1hz square wave + * 4096 : 4096hz square wave + * 8192 : 8192hz square wave + * 32768 : 32768hz square wave + * + * Example: + * "rtc-ds1338": { + * "i2c-bus": "i2c-versatile.0", + * "square-wave-output": 0 + * } + */ + +enum { + DS1338_SECOND = 0x0, + DS1338_MINUTE = 0x1, + DS1338_HOUR = 0x2, + DS1338_DAY = 0x3, + DS1338_DATE = 0x4, + DS1338_MONTH = 0x5, + DS1338_YEAR = 0x6, + DS1338_CTRL = 0x7, + DS1338_NVRAM = 0x8, +}; + +struct rtc_ds1338_pdata_t { + struct i2c_device_t * dev; +}; + +static bool_t ds1338_read(struct i2c_device_t * dev, u8_t reg, u8_t * buf, int len) +{ + struct i2c_msg_t msgs[2]; + + msgs[0].addr = dev->addr; + msgs[0].flags = 0; + msgs[0].len = 1; + msgs[0].buf = ® + + msgs[1].addr = dev->addr; + msgs[1].flags = I2C_M_RD; + msgs[1].len = len; + msgs[1].buf = buf; + + if(i2c_transfer(dev->i2c, msgs, 2) != 2) + return FALSE; + return TRUE; +} + +static bool_t ds1338_write(struct i2c_device_t * dev, u8_t reg, u8_t * buf, int len) +{ + struct i2c_msg_t msg; + u8_t mbuf[256]; + + if(len > sizeof(mbuf) - 1) + len = sizeof(mbuf) - 1; + mbuf[0] = reg; + memcpy(&mbuf[1], buf, len); + + msg.addr = dev->addr; + msg.flags = 0; + msg.len = len + 1; + msg.buf = &mbuf[0]; + + if(i2c_transfer(dev->i2c, &msg, 1) != 1) + return FALSE; + return TRUE; +} + +static bool_t rtc_ds1338_settime(struct rtc_t * rtc, struct rtc_time_t * time) +{ + struct rtc_ds1338_pdata_t * pdat = (struct rtc_ds1338_pdata_t *)rtc->priv; + u8_t buf[7]; + + buf[0] = bin2bcd(time->second) & 0x7f; + buf[1] = bin2bcd(time->minute) & 0x7f; + buf[2] = bin2bcd(time->hour) & 0x3f; + buf[3] = bin2bcd(time->week + 1) & 0x7; + buf[4] = bin2bcd(time->day) & 0x3f; + buf[5] = bin2bcd(time->month) & 0x1f; + buf[6] = bin2bcd(time->year - 2000) & 0xff; + + if(ds1338_write(pdat->dev, DS1338_SECOND, buf, 7)) + return TRUE; + return FALSE; +} + +static bool_t rtc_ds1338_gettime(struct rtc_t * rtc, struct rtc_time_t * time) +{ + struct rtc_ds1338_pdata_t * pdat = (struct rtc_ds1338_pdata_t *)rtc->priv; + u8_t buf[7]; + + if(!ds1338_read(pdat->dev, DS1338_SECOND, buf, 7)) + return FALSE; + + time->second = bcd2bin(buf[0] & 0x7f); + time->minute = bcd2bin(buf[1] & 0x7f); + time->hour = bcd2bin(buf[2] & 0x3f); + time->week = bcd2bin(buf[3] & 0x07) - 1; + time->day = bcd2bin(buf[4] & 0x3f); + time->month = bcd2bin(buf[5] & 0x1f); + time->year = bcd2bin(buf[6] & 0xff) + 2000; + return TRUE; +} + +static struct device_t * rtc_ds1338_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct rtc_ds1338_pdata_t * pdat; + struct rtc_t * rtc; + struct device_t * dev; + struct i2c_device_t * i2cdev; + u8_t buf[8], ctrl; + + i2cdev = i2c_device_alloc(dt_read_string(n, "i2c-bus", NULL), 0x68, 0); + if(!i2cdev) + return NULL; + + if(ds1338_read(i2cdev, DS1338_CTRL, &ctrl, 1)) + { + if(ctrl & 0x20) + { + buf[0] = bin2bcd(0) & 0x7f; + buf[1] = bin2bcd(0) & 0x7f; + buf[2] = bin2bcd(0) & 0x3f; + buf[3] = bin2bcd(5 + 1) & 0x7; + buf[4] = bin2bcd(1) & 0x3f; + buf[5] = bin2bcd(1) & 0x1f; + buf[6] = bin2bcd(2016 - 2000) & 0xff; + + switch(dt_read_int(n, "square-wave-output", 0)) + { + case -1: /* high level */ + buf[7] = 0x80; + break; + case 0: /* low level */ + buf[7] = 0x00; + break; + case 1: /* 1hz */ + buf[7] = 0x10; + break; + case 4096: /* 4096hz */ + buf[7] = 0x11; + break; + case 8192: /* 8192hz */ + buf[7] = 0x12; + break; + case 32768: /* 32768hz */ + buf[7] = 0x13; + break; + default: + buf[7] = 0x00; + break; + } + ds1338_write(i2cdev, DS1338_SECOND, buf, 8); + } + } + else + { + i2c_device_free(i2cdev); + return NULL; + } + + pdat = malloc(sizeof(struct rtc_ds1338_pdata_t)); + if(!pdat) + { + i2c_device_free(i2cdev); + return NULL; + } + + rtc = malloc(sizeof(struct rtc_t)); + if(!rtc) + { + i2c_device_free(i2cdev); + free(pdat); + return NULL; + } + + pdat->dev = i2cdev; + + rtc->name = alloc_device_name(dt_read_name(n), -1); + rtc->settime = rtc_ds1338_settime; + rtc->gettime = rtc_ds1338_gettime; + rtc->priv = pdat; + + if(!(dev = register_rtc(rtc, drv))) + { + i2c_device_free(pdat->dev); + free_device_name(rtc->name); + free(rtc->priv); + free(rtc); + return NULL; + } + return dev; +} + +static void rtc_ds1338_remove(struct device_t * dev) +{ + struct rtc_t * rtc = (struct rtc_t *)dev->priv; + struct rtc_ds1338_pdata_t * pdat = (struct rtc_ds1338_pdata_t *)rtc->priv; + + if(rtc) + { + unregister_rtc(rtc); + i2c_device_free(pdat->dev); + free_device_name(rtc->name); + free(rtc->priv); + free(rtc); + } +} + +static void rtc_ds1338_suspend(struct device_t * dev) +{ +} + +static void rtc_ds1338_resume(struct device_t * dev) +{ +} + +static struct driver_t rtc_ds1338 = { + .name = "rtc-ds1338", + .probe = rtc_ds1338_probe, + .remove = rtc_ds1338_remove, + .suspend = rtc_ds1338_suspend, + .resume = rtc_ds1338_resume, +}; + +static __init void rtc_ds1338_driver_init(void) +{ + register_driver(&rtc_ds1338); +} + +static __exit void rtc_ds1338_driver_exit(void) +{ + unregister_driver(&rtc_ds1338); +} + +driver_initcall(rtc_ds1338_driver_init); +driver_exitcall(rtc_ds1338_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/rtc-pl031.c b/src/arch/arm32/mach-versatile/driver/rtc-pl031.c new file mode 100755 index 0000000000000000000000000000000000000000..0bcc8acb4d6a9c0805e2a811f258157f5f218c4b --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/rtc-pl031.c @@ -0,0 +1,222 @@ +/* + * driver/rtc-pl031.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include + +/* + * PrimeCell PL031 - Real-Time Clock Interface For ARM AMBA + * + * Example: + * "rtc-pl031@0x10017000": { + * } + */ + +enum { + RTC_DR = 0x00, /* Data read register */ + RTC_MR = 0x04, /* Match register */ + RTC_LR = 0x08, /* Data load register */ + RTC_CR = 0x0c, /* Control register */ + RTC_IMSC = 0x10, /* Interrupt mask and set register */ + RTC_RIS = 0x14, /* Raw interrupt status register */ + RTC_MIS = 0x18, /* Masked interrupt status register */ + RTC_ICR = 0x1c, /* Interrupt clear register */ +}; + +#define LEAPS_THRU_END(y) ((y)/4 - (y)/100 + (y)/400) +#define LEAP_YEAR(year) ((!(year % 4) && (year % 100)) || !(year % 400)) + +struct rtc_pl031_pdata_t { + virtual_addr_t virt; +}; + +static int rtc_month_days(int year, int month) +{ + const unsigned char rtc_days_in_month[13] = { + 0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 + }; + return rtc_days_in_month[month] + (LEAP_YEAR(year) && (month == 2)); +} + +static void to_rtc_time(u32_t time, struct rtc_time_t * rt) +{ + u32_t month, year; + int days; + int newdays; + + days = time / 86400; + time -= (u32_t)days * 86400; + + rt->week = (days + 4) % 7; + + year = 1970 + days / 365; + days -= (year - 1970) * 365 + LEAPS_THRU_END(year - 1) - LEAPS_THRU_END(1970 - 1); + + if(days < 0) + { + year -= 1; + days += 365 + LEAP_YEAR(year); + } + rt->year = year; + rt->day = days + 1; + + for(month = 1; month < 12; month++) + { + newdays = days - rtc_month_days(year, month); + if(newdays < 0) + break; + days = newdays; + } + rt->month = month; + rt->day = days + 1; + + rt->hour = time / 3600; + time -= rt->hour * 3600; + rt->minute = time / 60; + rt->second = time - rt->minute * 60; +} + +static u32_t from_rtc_time(struct rtc_time_t * rt) +{ + int month = rt->month, year = rt->year; + + if (0 >= (int)(month -= 2)) + { + month += 12; + year -= 1; + } + + return ((((u32_t)(year/4 - year/100 + year/400 + 367*month/12 + rt->day) + year*365 - 719499)*24 + rt->hour)*60 + rt->minute)*60 + rt->second; +} + +static bool_t rtc_pl031_settime(struct rtc_t * rtc, struct rtc_time_t * time) +{ + struct rtc_pl031_pdata_t * pdat = (struct rtc_pl031_pdata_t *)rtc->priv; + + write32(pdat->virt + RTC_LR, from_rtc_time(time)); + return TRUE; +} + +static bool_t rtc_pl031_gettime(struct rtc_t * rtc, struct rtc_time_t * time) +{ + struct rtc_pl031_pdata_t * pdat = (struct rtc_pl031_pdata_t *)rtc->priv; + + to_rtc_time(read32(pdat->virt + RTC_DR), time); + return TRUE; +} + +static struct device_t * rtc_pl031_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct rtc_pl031_pdata_t * pdat; + struct rtc_t * rtc; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x031) + return NULL; + + pdat = malloc(sizeof(struct rtc_pl031_pdata_t)); + if(!pdat) + return NULL; + + rtc = malloc(sizeof(struct rtc_t)); + if(!rtc) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + + rtc->name = alloc_device_name(dt_read_name(n), -1); + rtc->settime = rtc_pl031_settime; + rtc->gettime = rtc_pl031_gettime; + rtc->priv = pdat; + + write32(pdat->virt + RTC_IMSC, 1); + write32(pdat->virt + RTC_ICR, 1); + write32(pdat->virt + RTC_CR, 1); + + if(!(dev = register_rtc(rtc, drv))) + { + free_device_name(rtc->name); + free(rtc->priv); + free(rtc); + return NULL; + } + return dev; +} + +static void rtc_pl031_remove(struct device_t * dev) +{ + struct rtc_t * rtc = (struct rtc_t *)dev->priv; + struct rtc_pl031_pdata_t * pdat = (struct rtc_pl031_pdata_t *)rtc->priv; + + if(rtc) + { + unregister_rtc(rtc); + write32(pdat->virt + RTC_IMSC, 1); + write32(pdat->virt + RTC_ICR, 1); + free_device_name(rtc->name); + free(rtc->priv); + free(rtc); + } +} + +static void rtc_pl031_suspend(struct device_t * dev) +{ +} + +static void rtc_pl031_resume(struct device_t * dev) +{ +} + +static struct driver_t rtc_pl031 = { + .name = "rtc-pl031", + .probe = rtc_pl031_probe, + .remove = rtc_pl031_remove, + .suspend = rtc_pl031_suspend, + .resume = rtc_pl031_resume, +}; + +static __init void rtc_pl031_driver_init(void) +{ + register_driver(&rtc_pl031); +} + +static __exit void rtc_pl031_driver_exit(void) +{ + unregister_driver(&rtc_pl031); +} + +driver_initcall(rtc_pl031_driver_init); +driver_exitcall(rtc_pl031_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/sdhci-pl180.c b/src/arch/arm32/mach-versatile/driver/sdhci-pl180.c new file mode 100755 index 0000000000000000000000000000000000000000..be8d8499cc0542e1945f087f6a24edd192eb06b1 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/sdhci-pl180.c @@ -0,0 +1,379 @@ +/* + * driver/sdhci-pl180.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include + +#define PL180_POWER (0x00) +#define PL180_CLOCK (0x04) +#define PL180_ARGUMENT (0x08) +#define PL180_COMMAND (0x0c) +#define PL180_RESPCMD (0x10) +#define PL180_RESP0 (0x14) +#define PL180_RESP1 (0x18) +#define PL180_RESP2 (0x1c) +#define PL180_RESP3 (0x20) +#define PL180_DATA_TIMER (0x24) +#define PL180_DATA_LENGTH (0x28) +#define PL180_DATA_CTRL (0x2c) +#define PL180_DATA_CNT (0x30) +#define PL180_STATUS (0x34) +#define PL180_CLEAR (0x38) +#define PL180_MASK0 (0x3c) +#define PL180_MASK1 (0x40) +#define PL180_SELECT (0x44) +#define PL180_FIFO_CNT (0x48) +#define PL180_FIFO (0x80) + +#define PL180_CMD_WAITRESP (1 << 6) +#define PL180_CMD_LONGRSP (1 << 7) +#define PL180_CMD_WAITINT (1 << 8) +#define PL180_CMD_WAITPEND (1 << 9) +#define PL180_CMD_ENABLE (1 << 10) + +#define PL180_STAT_CMD_CRC_FAIL (1 << 0) +#define PL180_STAT_DAT_CRC_FAIL (1 << 1) +#define PL180_STAT_CMD_TIME_OUT (1 << 2) +#define PL180_STAT_DAT_TIME_OUT (1 << 3) +#define PL180_STAT_TX_UNDERRUN (1 << 4) +#define PL180_STAT_RX_OVERRUN (1 << 5) +#define PL180_STAT_CMD_RESP_END (1 << 6) +#define PL180_STAT_CMD_SENT (1 << 7) +#define PL180_STAT_DAT_END (1 << 8) +#define PL180_STAT_DAT_BLK_END (1 << 10) +#define PL180_STAT_CMD_ACT (1 << 11) +#define PL180_STAT_TX_ACT (1 << 12) +#define PL180_STAT_RX_ACT (1 << 13) +#define PL180_STAT_TX_FIFO_HALF (1 << 14) +#define PL180_STAT_RX_FIFO_HALF (1 << 15) +#define PL180_STAT_TX_FIFO_FULL (1 << 16) +#define PL180_STAT_RX_FIFO_FULL (1 << 17) +#define PL180_STAT_TX_FIFO_ZERO (1 << 18) +#define PL180_STAT_RX_DAT_ZERO (1 << 19) +#define PL180_STAT_TX_DAT_AVL (1 << 20) +#define PL180_STAT_RX_FIFO_AVL (1 << 21) + +#define PL180_CLR_CMD_CRC_FAIL (1 << 0) +#define PL180_CLR_DAT_CRC_FAIL (1 << 1) +#define PL180_CLR_CMD_TIMEOUT (1 << 2) +#define PL180_CLR_DAT_TIMEOUT (1 << 3) +#define PL180_CLR_TX_UNDERRUN (1 << 4) +#define PL180_CLR_RX_OVERRUN (1 << 5) +#define PL180_CLR_CMD_RESP_END (1 << 6) +#define PL180_CLR_CMD_SENT (1 << 7) +#define PL180_CLR_DAT_END (1 << 8) +#define PL180_CLR_DAT_BLK_END (1 << 10) + +struct sdhci_pl180_pdata_t { + virtual_addr_t virt; +}; + +static bool_t pl180_transfer_command(struct sdhci_pl180_pdata_t * pdat, struct sdhci_cmd_t * cmd) +{ + u32_t cmdidx; + u32_t status; + bool_t ret = TRUE; + + if(read32(pdat->virt + PL180_COMMAND) & PL180_CMD_ENABLE) + write32(pdat->virt + PL180_COMMAND, 0x0); + + cmdidx = (cmd->cmdidx & 0xff) | PL180_CMD_ENABLE; + if(cmd->resptype) + { + cmdidx |= PL180_CMD_WAITRESP; + if(cmd->resptype & MMC_RSP_136) + cmdidx |= PL180_CMD_LONGRSP; + } + + write32(pdat->virt + PL180_ARGUMENT, cmd->cmdarg); + write32(pdat->virt + PL180_COMMAND, cmdidx); + + do { + status = read32(pdat->virt + PL180_STATUS); + } while(!(status & (PL180_STAT_CMD_SENT | PL180_STAT_CMD_RESP_END | PL180_STAT_CMD_TIME_OUT | PL180_STAT_CMD_CRC_FAIL))); + + if(cmd->resptype & MMC_RSP_PRESENT) + { + cmd->response[0] = read32(pdat->virt + PL180_RESP0); + if(cmd->resptype & MMC_RSP_136) + { + cmd->response[1] = read32(pdat->virt + PL180_RESP1); + cmd->response[2] = read32(pdat->virt + PL180_RESP2); + cmd->response[3] = read32(pdat->virt + PL180_RESP3); + } + } + + if(status & PL180_STAT_CMD_TIME_OUT) + ret = FALSE; + else if ((status & PL180_STAT_CMD_CRC_FAIL) && (cmd->resptype & MMC_RSP_CRC)) + ret = FALSE; + + write32(pdat->virt + PL180_CLEAR, (PL180_CLR_CMD_SENT | PL180_CLR_CMD_RESP_END | PL180_CLR_CMD_TIMEOUT | PL180_CLR_CMD_CRC_FAIL)); + return ret; +} + +static bool_t read_bytes(struct sdhci_pl180_pdata_t * pdat, u32_t * buf, u32_t blkcount, u32_t blksize) +{ + u32_t * tmp = buf; + u64_t count = blkcount * blksize; + u32_t status, err; + + status = read32(pdat->virt + PL180_STATUS); + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT | PL180_STAT_RX_OVERRUN); + while((!err) && (count >= sizeof(u32_t))) + { + if(status & PL180_STAT_RX_FIFO_AVL) + { + *(tmp) = read32(pdat->virt + PL180_FIFO); + tmp++; + count -= sizeof(u32_t); + } + status = read32(pdat->virt + PL180_STATUS); + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT | PL180_STAT_RX_OVERRUN); + } + + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT | PL180_STAT_DAT_BLK_END | PL180_STAT_RX_OVERRUN); + while(!err) + { + status = read32(pdat->virt + PL180_STATUS); + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT | PL180_STAT_DAT_BLK_END | PL180_STAT_RX_OVERRUN); + } + + if(status & PL180_STAT_DAT_TIME_OUT) + return FALSE; + else if (status & PL180_STAT_DAT_CRC_FAIL) + return FALSE; + else if (status & PL180_STAT_RX_OVERRUN) + return FALSE; + write32(pdat->virt + PL180_CLEAR, 0x1DC007FF); + + if(count) + return FALSE; + return TRUE; +} + +static bool_t write_bytes(struct sdhci_pl180_pdata_t * pdat, u32_t * buf, u32_t blkcount, u32_t blksize) +{ + u32_t * tmp = buf; + u64_t count = blkcount * blksize; + u32_t status, err; + int i; + + status = read32(pdat->virt + PL180_STATUS); + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT); + while(!err && count) + { + if(status & PL180_STAT_TX_FIFO_HALF) + { + if(count >= 8 * sizeof(u32_t)) + { + for(i = 0; i < 8; i++) + write32(pdat->virt + PL180_FIFO, *(tmp + i)); + tmp += 8; + count -= 8 * sizeof(u32_t); + } + else + { + while(count >= sizeof(u32_t)) + { + write32(pdat->virt + PL180_FIFO, *tmp); + tmp++; + count -= sizeof(u32_t); + } + } + } + status = read32(pdat->virt + PL180_STATUS); + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT); + } + + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT | PL180_STAT_DAT_BLK_END); + while(!err) + { + status = read32(pdat->virt + PL180_STATUS); + err = status & (PL180_STAT_DAT_CRC_FAIL | PL180_STAT_DAT_TIME_OUT | PL180_STAT_DAT_BLK_END); + } + + if(status & PL180_STAT_DAT_TIME_OUT) + return FALSE; + else if (status & PL180_STAT_DAT_CRC_FAIL) + return FALSE; + write32(pdat->virt + PL180_CLEAR, 0x1DC007FF); + + if(count) + return FALSE; + return TRUE; +} + +static bool_t pl180_transfer_data(struct sdhci_pl180_pdata_t * pdat, struct sdhci_cmd_t * cmd, struct sdhci_data_t * dat) +{ + u32_t dlen = (u32_t)(dat->blkcnt * dat->blksz); + u32_t blksz_bits = ffs(dat->blksz) - 1; + u32_t dctrl = (blksz_bits << 4) | (0x1 << 0) | (0x1 << 14); + bool_t ret = FALSE; + + write32(pdat->virt + PL180_DATA_TIMER, 0xffff); + write32(pdat->virt + PL180_DATA_LENGTH, dlen); + + if(dat->flag & MMC_DATA_READ) + { + dctrl |= (0x1 << 1); + write32(pdat->virt + PL180_DATA_CTRL, dctrl); + if(!pl180_transfer_command(pdat, cmd)) + return FALSE; + ret = read_bytes(pdat, (u32_t *)dat->buf, dat->blkcnt, dat->blksz); + } + else if(dat->flag & MMC_DATA_WRITE) + { + if(!pl180_transfer_command(pdat, cmd)) + return FALSE; + write32(pdat->virt + PL180_DATA_CTRL, dctrl); + ret = write_bytes(pdat, (u32_t *)dat->buf, dat->blkcnt, dat->blksz); + } + return ret; +} + +static bool_t sdhci_pl180_detect(struct sdhci_t * sdhci) +{ + return TRUE; +} + +static bool_t sdhci_pl180_reset(struct sdhci_t * sdhci) +{ + return TRUE; +} + +static bool_t sdhci_pl180_setwidth(struct sdhci_t * sdhci, u32_t width) +{ + return TRUE; +} + +static bool_t sdhci_pl180_setclock(struct sdhci_t * sdhci, u32_t clock) +{ + return TRUE; +} + +static bool_t sdhci_pl180_transfer(struct sdhci_t * sdhci, struct sdhci_cmd_t * cmd, struct sdhci_data_t * dat) +{ + struct sdhci_pl180_pdata_t * pdat = (struct sdhci_pl180_pdata_t *)sdhci->priv; + + if(!dat) + return pl180_transfer_command(pdat, cmd); + return pl180_transfer_data(pdat, cmd, dat); +} + +static struct device_t * sdhci_pl180_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct sdhci_pl180_pdata_t * pdat; + struct sdhci_t * sdhci; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x181) + return NULL; + + pdat = malloc(sizeof(struct sdhci_pl180_pdata_t)); + if(!pdat) + return NULL; + + sdhci = malloc(sizeof(struct sdhci_t)); + if(!sdhci) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + + sdhci->name = alloc_device_name(dt_read_name(n), -1); + sdhci->voltage = MMC_VDD_27_36; + sdhci->width = MMC_BUS_WIDTH_4; + sdhci->clock = (u32_t)dt_read_long(n, "max-clock-frequency", 25 * 1000 * 1000); + sdhci->removable = TRUE; + sdhci->detect = sdhci_pl180_detect; + sdhci->reset = sdhci_pl180_reset; + sdhci->setwidth = sdhci_pl180_setwidth; + sdhci->setclock = sdhci_pl180_setclock; + sdhci->transfer = sdhci_pl180_transfer; + sdhci->priv = pdat; + write32(pdat->virt + PL180_POWER, 0xbf); + + if(!(dev = register_sdhci(sdhci, drv))) + { + free_device_name(sdhci->name); + free(sdhci->priv); + free(sdhci); + return NULL; + } + return dev; +} + +static void sdhci_pl180_remove(struct device_t * dev) +{ + struct sdhci_t * sdhci = (struct sdhci_t *)dev->priv; + + if(sdhci) + { + unregister_sdhci(sdhci); + free_device_name(sdhci->name); + free(sdhci->priv); + free(sdhci); + } +} + +static void sdhci_pl180_suspend(struct device_t * dev) +{ +} + +static void sdhci_pl180_resume(struct device_t * dev) +{ +} + +static struct driver_t sdhci_pl180 = { + .name = "sdhci-pl180", + .probe = sdhci_pl180_probe, + .remove = sdhci_pl180_remove, + .suspend = sdhci_pl180_suspend, + .resume = sdhci_pl180_resume, +}; + +static __init void sdhci_pl180_driver_init(void) +{ + register_driver(&sdhci_pl180); +} + +static __exit void sdhci_pl180_driver_exit(void) +{ + unregister_driver(&sdhci_pl180); +} + +driver_initcall(sdhci_pl180_driver_init); +driver_exitcall(sdhci_pl180_driver_exit); diff --git a/src/arch/arm32/mach-versatile/driver/uart-pl011.c b/src/arch/arm32/mach-versatile/driver/uart-pl011.c new file mode 100755 index 0000000000000000000000000000000000000000..e8c95fdb7779373cee2f7f9714c258e6c0b9b858 --- /dev/null +++ b/src/arch/arm32/mach-versatile/driver/uart-pl011.c @@ -0,0 +1,345 @@ +/* + * driver/uart-pl011.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include +#include + +/* + * PrimeCell PL011 - Universal Asynchronous Receiver Transmitter + * + * Required properties: + * - clock-name: uart parant clock name + * + * Optional properties: + * - txd-gpio: uart txd gpio + * - txd-gpio-config: uart txd gpio config + * - rxd-gpio: uart rxd gpio + * - rxd-gpio-config: uart rxd gpio config + * - baud-rates: uart baud rates, default is 115200 + * - data-bits: uart data bits, default is 8 + * - parity-bits: uart parity bits, default is 0 + * - stop-bits: uart stop bits, default is 1 + * + * Example: + * "uart-pl011@0x10009000": { + * "clock-name": "uclk", + * "txd-gpio": -1, + * "txd-gpio-config": -1, + * "rxd-gpio": -1, + * "rxd-gpio-config": -1, + * "baud-rates": 115200, + * "data-bits": 8, + * "parity-bits": 0, + * "stop-bits": 1 + * } + */ + +enum { + UART_DATA = 0x00, + UART_RSR = 0x04, + UART_FR = 0x18, + UART_ILPR = 0x20, + UART_IBRD = 0x24, + UART_FBRD = 0x28, + UART_LCRH = 0x2c, + UART_CR = 0x30, + UART_IFLS = 0x34, + UART_IMSC = 0x38, + UART_RIS = 0x3c, + UART_MIS = 0x40, + UART_ICR = 0x44, + UART_DMACR = 0x48, +}; + +struct uart_pl011_pdata_t { + virtual_addr_t virt; + char * clk; + int txd; + int txdcfg; + int rxd; + int rxdcfg; + int baud; + int data; + int parity; + int stop; +}; + +static bool_t uart_pl011_set(struct uart_t * uart, int baud, int data, int parity, int stop) +{ + struct uart_pl011_pdata_t * pdat = (struct uart_pl011_pdata_t *)uart->priv; + u32_t divider, remainder, fraction, val; + u8_t dreg, preg, sreg; + u64_t uclk; + + if(baud < 0) + return FALSE; + if((data < 5) || (data > 8)) + return FALSE; + if((parity < 0) || (parity > 2)) + return FALSE; + if((stop < 0) || (stop > 2)) + return FALSE; + + switch(data) + { + case 5: /* Data bits = 5 */ + dreg = 0x0; + break; + case 6: /* Data bits = 6 */ + dreg = 0x1; + break; + case 7: /* Data bits = 7 */ + dreg = 0x2; + break; + case 8: /* Data bits = 8 */ + dreg = 0x3; + break; + default: + return FALSE; + } + + switch(parity) + { + case 0: /* Parity none */ + preg = 0x0; + break; + case 1: /* Parity odd */ + preg = 0x1; + break; + case 2: /* Parity even */ + preg = 0x3; + break; + default: + return FALSE; + } + + switch(stop) + { + case 1: /* Stop bits = 1 */ + sreg = 0; + break; + case 2: /* Stop bits = 2 */ + sreg = 1; + break; + case 0: /* Stop bits = 1.5 */ + default: + return FALSE; + } + + pdat->baud = baud; + pdat->data = data; + pdat->parity = parity; + pdat->stop = stop; + + /* + * IBRD = UART_CLK / (16 * BAUD_RATE) + * FBRD = ROUND((64 * MOD(UART_CLK, (16 * BAUD_RATE))) / (16 * BAUD_RATE)) + */ + uclk = clk_get_rate(pdat->clk); + divider = uclk / (16 * baud); + remainder = uclk % (16 * baud); + fraction = (8 * remainder / baud) >> 1; + fraction += (8 * remainder / baud) & 1; + + write32(pdat->virt + UART_IBRD, divider); + write32(pdat->virt + UART_FBRD, fraction); + val = read32(pdat->virt + UART_LCRH); + val &= ~0x6e; + val |= (dreg << 5) | (sreg << 3) | (preg << 1); + write32(pdat->virt + UART_LCRH, val); + + return TRUE; +} + +static bool_t uart_pl011_get(struct uart_t * uart, int * baud, int * data, int * parity, int * stop) +{ + struct uart_pl011_pdata_t * pdat = (struct uart_pl011_pdata_t *)uart->priv; + + if(baud) + *baud = pdat->baud; + if(data) + *data = pdat->data; + if(parity) + *parity = pdat->parity; + if(stop) + *stop = pdat->stop; + return TRUE; +} + +static ssize_t uart_pl011_read(struct uart_t * uart, u8_t * buf, size_t count) +{ + struct uart_pl011_pdata_t * pdat = (struct uart_pl011_pdata_t *)uart->priv; + ssize_t i; + + for(i = 0; i < count; i++) + { + if(!(read8(pdat->virt + UART_FR) & (0x1 << 4))) + buf[i] = read8(pdat->virt + UART_DATA); + else + break; + } + return i; +} + +static ssize_t uart_pl011_write(struct uart_t * uart, const u8_t * buf, size_t count) +{ + struct uart_pl011_pdata_t * pdat = (struct uart_pl011_pdata_t *)uart->priv; + ssize_t i; + + for(i = 0; i < count; i++) + { + while((read8(pdat->virt + UART_FR) & (0x1 << 5))); + write8(pdat->virt + UART_DATA, buf[i]); + } + return i; +} + +static struct device_t * uart_pl011_probe(struct driver_t * drv, struct dtnode_t * n) +{ + struct uart_pl011_pdata_t * pdat; + struct uart_t * uart; + struct device_t * dev; + virtual_addr_t virt = phys_to_virt(dt_read_address(n)); + u32_t id = (((read32(virt + 0xfec) & 0xff) << 24) | + ((read32(virt + 0xfe8) & 0xff) << 16) | + ((read32(virt + 0xfe4) & 0xff) << 8) | + ((read32(virt + 0xfe0) & 0xff) << 0)); + char * clk = dt_read_string(n, "clock-name", NULL); + + if(((id >> 12) & 0xff) != 0x41 || (id & 0xfff) != 0x011) + return NULL; + + if(!search_clk(clk)) + return NULL; + + pdat = malloc(sizeof(struct uart_pl011_pdata_t)); + if(!pdat) + return NULL; + + uart = malloc(sizeof(struct uart_t)); + if(!uart) + { + free(pdat); + return NULL; + } + + pdat->virt = virt; + pdat->clk = strdup(clk); + pdat->txd = dt_read_int(n, "txd-gpio", -1); + pdat->txdcfg = dt_read_int(n, "txd-gpio-config", -1); + pdat->rxd = dt_read_int(n, "rxd-gpio", -1); + pdat->rxdcfg = dt_read_int(n, "rxd-gpio-config", -1); + pdat->baud = dt_read_int(n, "baud-rates", 115200); + pdat->data = dt_read_int(n, "data-bits", 8); + pdat->parity = dt_read_int(n, "parity-bits", 0); + pdat->stop = dt_read_int(n, "stop-bits", 1); + + uart->name = alloc_device_name(dt_read_name(n), -1); + uart->set = uart_pl011_set; + uart->get = uart_pl011_get; + uart->read = uart_pl011_read; + uart->write = uart_pl011_write; + uart->priv = pdat; + + clk_enable(pdat->clk); + if(pdat->txd >= 0) + { + if(pdat->txdcfg >= 0) + gpio_set_cfg(pdat->txd, pdat->txdcfg); + gpio_set_pull(pdat->txd, GPIO_PULL_UP); + } + if(pdat->rxd >= 0) + { + if(pdat->rxdcfg >= 0) + gpio_set_cfg(pdat->rxd, pdat->rxdcfg); + gpio_set_pull(pdat->rxd, GPIO_PULL_UP); + } + write32(pdat->virt + UART_LCRH, read32(pdat->virt + UART_LCRH) | (1 << 4)); + write32(pdat->virt + UART_CR, (1 << 0) | (1 << 8) | (1 << 9)); + uart_pl011_set(uart, pdat->baud, pdat->data, pdat->parity, pdat->stop); + + if(!(dev = register_uart(uart, drv))) + { + write32(pdat->virt + UART_CR, 0x0); + clk_disable(pdat->clk); + free(pdat->clk); + free_device_name(uart->name); + free(uart->priv); + free(uart); + return NULL; + } + return dev; +} + +static void uart_pl011_remove(struct device_t * dev) +{ + struct uart_t * uart = (struct uart_t *)dev->priv; + struct uart_pl011_pdata_t * pdat = (struct uart_pl011_pdata_t *)uart->priv; + + if(uart) + { + unregister_uart(uart); + write32(pdat->virt + UART_CR, 0x0); + clk_disable(pdat->clk); + free(pdat->clk); + free_device_name(uart->name); + free(uart->priv); + free(uart); + } +} + +static void uart_pl011_suspend(struct device_t * dev) +{ +} + +static void uart_pl011_resume(struct device_t * dev) +{ +} + +static struct driver_t uart_pl011 = { + .name = "uart-pl011", + .probe = uart_pl011_probe, + .remove = uart_pl011_remove, + .suspend = uart_pl011_suspend, + .resume = uart_pl011_resume, +}; + +static __init void uart_pl011_driver_init(void) +{ + register_driver(&uart_pl011); +} + +static __exit void uart_pl011_driver_exit(void) +{ + unregister_driver(&uart_pl011); +} + +driver_initcall(uart_pl011_driver_init); +driver_exitcall(uart_pl011_driver_exit); diff --git a/src/arch/arm32/mach-versatile/exception.c b/src/arch/arm32/mach-versatile/exception.c new file mode 100755 index 0000000000000000000000000000000000000000..b4c053b48670d357c38f3862a80cd443f0a2e608 --- /dev/null +++ b/src/arch/arm32/mach-versatile/exception.c @@ -0,0 +1,89 @@ +/* + * exception.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include +#include +#include + +struct arm_regs_t { + uint32_t esp; + uint32_t cpsr; + uint32_t r[13]; + uint32_t sp; + uint32_t lr; + uint32_t pc; +}; + +static void show_regs(struct arm_regs_t * regs) +{ + int i; + + printf("pc : [<%08lx>] lr : [<%08lx>] cpsr: %08lx\r\n", regs->pc, regs->lr, regs->cpsr); + printf("sp : %08lx esp : %08lx\r\n", regs->sp, regs->esp); + for(i = 12; i >= 0; i--) + { + printf("r%-2d: %08lx ", i, regs->r[i]); + if(i % 2 == 0) + printf("\r\n"); + } + printf("\r\n"); +} + +void arm32_do_undefined_instruction(struct arm_regs_t * regs) +{ + show_regs(regs); + regs->pc += 4; +} + +void arm32_do_software_interrupt(struct arm_regs_t * regs) +{ + show_regs(regs); + regs->pc += 4; +} + +void arm32_do_prefetch_abort(struct arm_regs_t * regs) +{ + show_regs(regs); + regs->pc += 4; +} + +void arm32_do_data_abort(struct arm_regs_t * regs) +{ + show_regs(regs); + regs->pc += 4; +} + +void arm32_do_irq(struct arm_regs_t * regs) +{ + interrupt_handle_exception(regs); +} + +void arm32_do_fiq(struct arm_regs_t * regs) +{ + interrupt_handle_exception(regs); +} diff --git a/src/arch/arm32/mach-versatile/include/cache.h b/src/arch/arm32/mach-versatile/include/cache.h new file mode 100755 index 0000000000000000000000000000000000000000..185e017084394d795389e8deed140c2d22459714 --- /dev/null +++ b/src/arch/arm32/mach-versatile/include/cache.h @@ -0,0 +1,28 @@ +#ifndef __ARM32_CACHE_H__ +#define __ARM32_CACHE_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include +#include + +void cache_flush_range(unsigned long start, unsigned long stop); +void cache_inv_range(unsigned long start, unsigned long stop); +void outer_cache_enable(void); +void outer_cache_disable(void); +void outer_cache_flush_range(unsigned long start, unsigned long stop); +void outer_cache_inv_range(unsigned long start, unsigned long stop); + +void mmu_setup(void); +void mmu_enable(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __CACHE_H__ */ diff --git a/src/arch/arm32/mach-versatile/include/configs.h b/src/arch/arm32/mach-versatile/include/configs.h new file mode 100755 index 0000000000000000000000000000000000000000..023b8ac82b21348bc114a5c6bd5d34a8b801c640 --- /dev/null +++ b/src/arch/arm32/mach-versatile/include/configs.h @@ -0,0 +1,4 @@ +#ifndef __OVERRIDE_CONFIGS_H__ +#define __OVERRIDE_CONFIGS_H__ + +#endif /* __OVERRIDE_CONFIGS_H__ */ diff --git a/src/arch/arm32/mach-versatile/mmu.c b/src/arch/arm32/mach-versatile/mmu.c new file mode 100755 index 0000000000000000000000000000000000000000..1644e608134af7ac2f65c0f52924963513514dcb --- /dev/null +++ b/src/arch/arm32/mach-versatile/mmu.c @@ -0,0 +1,94 @@ +/* + * mmu.c + * + * Copyright(c) 2007-2021 Jianjun Jiang <8192542@qq.com> + * Official site: http://xboot.org + * Mobile phone: +86-18665388956 + * QQ: 8192542 + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include + +enum { + MAP_TYPE_NCNB = 0x0, + MAP_TYPE_NCB = 0x1, + MAP_TYPE_CNB = 0x2, + MAP_TYPE_CB = 0x3, +}; + +static uint32_t __mmu_ttb[4096] __attribute__((aligned(0x4000))); + +static inline void mmu_ttb_set(uint32_t base) +{ + __asm__ __volatile__("mcr p15, 0, %0, c2, c0, 0" : : "r" (base) : "memory"); +} + +static inline void mmu_domain_set(uint32_t domain) +{ + __asm__ __volatile__("mcr p15, 0, %0, c3, c0, 0" : : "r" (domain) : "memory"); +} + +static inline void mmu_inv_tlb(void) +{ + __asm__ __volatile__("mcr p15, 0, %0, c8, c7, 0" : : "r" (0)); + __asm__ __volatile__("mcr p15, 0, %0, c8, c6, 0" : : "r" (0)); + __asm__ __volatile__("mcr p15, 0, %0, c8, c5, 0" : : "r" (0)); + dsb(); + isb(); +} + +static void map_l1_section(virtual_addr_t virt, physical_addr_t phys, physical_size_t size, int type) +{ + physical_size_t i; + + virt >>= 20; + phys >>= 20; + size >>= 20; + type &= 0x3; + + for(i = size; i > 0; i--, virt++, phys++) + __mmu_ttb[virt] = (phys << 20) | (1 << 16) | (0x3 << 10) | (0x0 << 5) | (type << 2) | (0x2 << 0); +} + +void mmu_setup(void) +{ + extern unsigned char __dma_start[]; + extern unsigned char __dma_end[]; + + map_l1_section(0x00000000, 0x00000000, SZ_2G, 0); + map_l1_section(0x80000000, 0x80000000, SZ_2G, 0); + map_l1_section(0x00000000, 0x00000000, SZ_256M, MAP_TYPE_CB); + map_l1_section((virtual_addr_t)__dma_start, (physical_addr_t)__dma_start, (physical_size_t)(__dma_end - __dma_start), MAP_TYPE_NCNB); +} + +void mmu_enable(void) +{ + mmu_ttb_set((uint32_t)(__mmu_ttb)); + cache_inv_range(0, ~0); + outer_cache_enable(); + outer_cache_inv_range(0, ~0); + mmu_inv_tlb(); + mmu_domain_set(0x3); + arm32_mmu_enable(); + arm32_icache_enable(); + arm32_dcache_enable(); +} diff --git a/src/arch/arm32/mach-versatile/romdisk/boot/versatile-arm926.json b/src/arch/arm32/mach-versatile/romdisk/boot/versatile-arm926.json new file mode 100755 index 0000000000000000000000000000000000000000..719d59a1ce087ab0b5f29ef3dfe7369abc3e6bd5 --- /dev/null +++ b/src/arch/arm32/mach-versatile/romdisk/boot/versatile-arm926.json @@ -0,0 +1,186 @@ +{ + "clk-fixed@0": { "name": "xtal", "rate": 12000000 }, + "clk-fixed@1": { "name": "uclk", "rate": 24000000 }, + "clk-fixed@2": { "name": "kclk", "rate": 24000000 }, + "clk-fixed@3": { "name": "mclk", "rate": 24000000 }, + "clk-fixed@4": { "name": "timclk", "rate": 1000000 }, + "clk-fixed@5": { "name": "refclk", "rate": 32768 }, + + + "irq-pl190@0x10140000": { + "interrupt-base": 0, + "interrupt-count": 32 + }, + + "irq-sic@0x10003000": { + "interrupt-base": 32, + "interrupt-count": 32, + "interrupt-parent": 31 + }, + + "dma-pl08x@0x10130000": { + "clock-name": "mclk", + "reset": -1, + "interrupt": 17, + "dma-base": 0, + "dma-count": 2 + }, + + "gpio-pl061@0x101e4000": { + "gpio-base": 0, + "gpio-count": 8, + "interrupt-offset": -1 + }, + + "gpio-pl061@0x101e5000": { + "gpio-base": 8, + "gpio-count": 8, + "interrupt-offset": -1 + }, + + "ce-sp804@0x101e2000": { + "clock-name": "timclk", + "interrupt": 4, + "timer-channel": 0 + }, + + "cs-sp804@0x101e3000": { + "clock-name": "timclk", + "interrupt": 5, + "timer-channel": 0 + }, + + "uart-pl011@0x101f1000": { + "clock-name": "uclk", + "txd-gpio": -1, + "txd-gpio-config": -1, + "rxd-gpio": -1, + "rxd-gpio-config": -1, + "baud-rates": 115200, + "data-bits": 8, + "parity-bits": 0, + "stop-bits": 1 + }, + + "uart-pl011@0x101f2000": { + "clock-name": "uclk", + "txd-gpio": -1, + "txd-gpio-config": -1, + "rxd-gpio": -1, + "rxd-gpio-config": -1, + "baud-rates": 115200, + "data-bits": 8, + "parity-bits": 0, + "stop-bits": 1 + }, + + "uart-pl011@0x101f3000": { + "clock-name": "uclk", + "txd-gpio": -1, + "txd-gpio-config": -1, + "rxd-gpio": -1, + "rxd-gpio-config": -1, + "baud-rates": 115200, + "data-bits": 8, + "parity-bits": 0, + "stop-bits": 1 + }, + + "i2c-versatile@0x10002000": { + "delay-us": 5 + }, + + "sdhci-pl180@0x10005000": { + }, + + "key-gpio-polled@0": { + "keys": [ + { "gpio": 5, "active-low": true, "key-code": 146 }, + { "gpio": 6, "active-low": true, "key-code": 159 } + ], + "poll-interval-ms": 100 + }, + + "keyboard-pl050@0x10006000": { + "clock-name": "kclk", + "interrupt": 35 + }, + + "mouse-pl050@0x10007000": { + "clock-name": "kclk", + "interrupt": 36, + "pointer-range-x": 640, + "pointer-range-y": 480, + "pointer-sensitivity": 6, + "simulate-touch-event": false + }, + + "led-gpio@0": { + "gpio": 0, + "active-low": true, + "default-brightness": 0 + }, + + "led-gpio@1": { + "gpio": 1, + "active-low": true, + "default-brightness": 0 + }, + + "ledtrigger-heartbeat@0": { + "led-name": "led-gpio.0", + "period-ms": 1260 + }, + + "ledtrigger-general@0": { + "led-name": "led-gpio.1" + }, + + "buzzer-gpio@0": { + "gpio": 8, + "active-low": true + }, + + "vibrator-gpio@0": { + "gpio": 9, + "active-low": true + }, + + "rtc-pl031@0x101e8000": { + }, + + "rtc-ds1338@0": { + "i2c-bus": "i2c-versatile.0", + "square-wave-output": 0 + }, + + "fb-pl110@0x10120000": { + "width": 800, + "height": 480, + "physical-width": 216, + "physical-height": 135, + "clock-frequency": 50000000, + "hfront-porch": 1, + "hback-porch": 1, + "hsync-len": 1, + "vfront-porch": 1, + "vback-porch": 1, + "vsync-len": 1, + "hsync-active": false, + "vsync-active": false, + "de-active":false, + "pixelclk-active":false + }, + + "console-uart@0": { + "uart-bus": "uart-pl011.0" + }, + + "console-uart@1": { + "uart-bus": "uart-pl011.1" + }, + + "console-uart@2": { + "uart-bus": "uart-pl011.2" + }, +} diff --git a/src/arch/arm32/mach-versatile/start.S b/src/arch/arm32/mach-versatile/start.S new file mode 100755 index 0000000000000000000000000000000000000000..3913914c2c34b0bee4abbc3523973ca247dbd561 --- /dev/null +++ b/src/arch/arm32/mach-versatile/start.S @@ -0,0 +1,295 @@ +/* + * start.S + * + * Copyright(c) 2007-2021 Kevin.Zhao + * Based on arch/arm32/mach-f1c100s/start.S by Jianjun Jiang <8192542@qq.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +.macro save_regs + str lr, [sp, #-4] + mrs lr, spsr_all + str lr, [sp, #-8] + str r1, [sp, #-12] + str r0, [sp, #-16] + mov r0, sp + mrs lr, cpsr_all + and lr, lr, #~(0x1f) + orr lr, lr, #0x13 + msr cpsr_c, lr + ldr r1, [r0, #-4] + str r1, [sp, #-4]! + ldr r1, [r0, #-8] + str r1, [sp, #-(4 * 16)] + ldr r1, [r0, #-12] + ldr r0, [r0, #-16] + stmdb sp, {r0 - r14}^ + sub sp, sp, #(4 * 16) + ldr r4, [sp] + and r0, r4, #0x1f + cmp r0, #0x10 + beq 10f + cmp r0, #0x13 + beq 11f + b . +11: add r1, sp, #(4 * 17) + str r1, [sp, #(4 * 14)] + str lr, [sp, #(4 * 15)] +10: add r1, sp, #(4 * 17) + str r1, [sp, #-4]! + mov r0, sp +.endm + +.macro restore_regs + mov r12, sp + ldr sp, [r12], #4 + ldr r1, [r12], #4 + msr spsr_cxsf, r1 + and r0, r1, #0x1f + cmp r0, #0x10 + beq 20f + cmp r0, #0x13 + beq 21f + b . +20: ldr lr, [r12, #(4 * 15)] + ldmia r12, {r0 - r14}^ + movs pc, lr +21: ldm r12, {r0 - r15}^ + mov r0, r0 +.endm + +/* + * Exception vector table + */ +.text + .arm + + .global _start +_start: + b reset + ldr pc, _undefined_instruction + ldr pc, _software_interrupt + ldr pc, _prefetch_abort + ldr pc, _data_abort + ldr pc, _not_used + ldr pc, _irq + ldr pc, _fiq + +_undefined_instruction: + .word undefined_instruction +_software_interrupt: + .word software_interrupt +_prefetch_abort: + .word prefetch_abort +_data_abort: + .word data_abort +_not_used: + .word not_used +_irq: + .word irq +_fiq: + .word fiq + +/* + * The actual reset code + */ +reset: + /* Clear all registers as zero */ + mov r0, #0 + mov r1, #0 + mov r2, #0 + mov r3, #0 + mov r4, #0 + mov r5, #0 + mov r6, #0 + mov r7, #0 + mov r8, #0 + mov r9, #0 + mov r10, #0 + mov r11, #0 + mov r12, #0 + mov sp, #0 + mov lr, #0 + + /* Disable cache and MMU in case it was left enabled from an earlier run + This does not need to be done from a cold reset */ + mrc p15, 0, r0 , c1, c0, 0 /* r0 := cp15 register 1 */ + bic r0, r0, #(0x1<<12) /* Ensure I Cache disabled */ + bic r0, r0, #(0x1<<3) /* Ensure Write buffer disabled */ + bic r0, r0, #(0x1<<2) /* Ensure D Cache disabled */ + bic r0, r0, #0x1 /* Clear M bit 0 to disable MMU */ + mcr p15, 0, r0 , c1, c0, 0 /* cp15 register 1 := r0 */ + + /* Invalidate ICache and DCache */ + mov r0, #0 + mcr p15, 0, r0, c7, c7, 0 + + /* Drain write buffer */ + mcr p15, 0, r0, c7, c10, 4 + + /* TLB maintenance, Invalidate Data and Instruction TLBs */ + mcr p15, 0, r0, c8, c7, 0 + + /* Initialize stacks */ + mrs r0, cpsr + bic r0, r0, #0x1f + orr r1, r0, #0x1b + msr cpsr_cxsf, r1 + ldr sp, _stack_und_end + + bic r0, r0, #0x1f + orr r1, r0, #0x17 + msr cpsr_cxsf, r1 + ldr sp, _stack_abt_end + + bic r0, r0, #0x1f + orr r1, r0, #0x12 + msr cpsr_cxsf, r1 + ldr sp, _stack_irq_end + + bic r0, r0, #0x1f + orr r1, r0, #0x11 + msr cpsr_cxsf, r1 + ldr sp, _stack_fiq_end + + bic r0, r0, #0x1f + orr r1, r0, #0x13 + msr cpsr_cxsf, r1 + ldr sp, _stack_srv_end + + /* Clear bss section */ + ldr r0, _bss_start + ldr r2, _bss_end + sub r2, r2, r0 + mov r1, #0 + bl memset + + /* Copy data section */ + ldr r0, _data_start + ldr r3, _image_start + ldr r1, _data_shadow_start + sub r1, r1, r3 + adr r3, _start + add r1, r1 ,r3 + ldr r2, _data_shadow_start + ldr r3, _data_shadow_end + sub r2, r3, r2 + bl memcpy + + /* Call _main */ + ldr r1, =_main + mov pc, r1 +_main: + bl mmu_setup + bl mmu_enable + bl xboot_main + b _main + +/* + * Exception handlers + */ + .align 5 +undefined_instruction: + sub lr, lr, #4 + save_regs + bl arm32_do_undefined_instruction + restore_regs + + .align 5 +software_interrupt: + sub lr, lr, #4 + save_regs + bl arm32_do_software_interrupt + restore_regs + + .align 5 +prefetch_abort: + sub lr, lr, #4 + save_regs + bl arm32_do_prefetch_abort + restore_regs + + .align 5 +data_abort: + sub lr, lr, #8 + save_regs + bl arm32_do_data_abort + restore_regs + + .align 5 +not_used: + b . + + .align 5 + .global irq +irq: + sub lr, lr, #4 + save_regs + bl arm32_do_irq + restore_regs + + .align 5 +fiq: + sub lr, lr, #4 + save_regs + bl arm32_do_fiq + restore_regs + +/* + * The location of section + */ + .align 4 +_image_start: + .long __image_start +_image_end: + .long __image_end +_data_shadow_start: + .long __data_shadow_start +_data_shadow_end: + .long __data_shadow_end +_data_start: + .long __data_start +_data_end: + .long __data_end +_bss_start: + .long __bss_start +_bss_end: + .long __bss_end +_stack_und_start: + .long __stack_und_start +_stack_und_end: + .long __stack_und_end +_stack_abt_start: + .long __stack_abt_start +_stack_abt_end: + .long __stack_abt_end +_stack_irq_start: + .long __stack_irq_start +_stack_irq_end: + .long __stack_irq_end +_stack_fiq_start: + .long __stack_fiq_start +_stack_fiq_end: + .long __stack_fiq_end +_stack_srv_start: + .long __stack_srv_start +_stack_srv_end: + .long __stack_srv_end diff --git a/src/arch/arm32/mach-versatile/versatile-arm926.c b/src/arch/arm32/mach-versatile/versatile-arm926.c new file mode 100755 index 0000000000000000000000000000000000000000..ac81a2e995af5b53a9334aa98a28ec794131bcd3 --- /dev/null +++ b/src/arch/arm32/mach-versatile/versatile-arm926.c @@ -0,0 +1,123 @@ +/* + * versatile-arm926.c + * + * Copyright(c) 2007-2021 Kevin.Zhao + * Based on arch/arm32/mach-f1c100s/sast-kk131.c by Jianjun Jiang <8192542@qq.com> + * + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ + +#include + +static int mach_detect(struct machine_t * mach) +{ +} + +static void mach_smpinit(struct machine_t * mach) +{ +} + +static void mach_smpboot(struct machine_t * mach, void (*func)(void)) +{ +} + +static void mach_shutdown(struct machine_t * mach) +{ +} + +static void mach_reboot(struct machine_t * mach) +{ +} + +static void mach_sleep(struct machine_t * mach) +{ +} + +static void mach_cleanup(struct machine_t * mach) +{ +} + +static void mach_logger(struct machine_t * mach, const char * buf, int count) +{ + virtual_addr_t virt = phys_to_virt(0x101f1000); + static int initial = 0; + int i; + + if(!initial) + { + u64_t clk = 24 * 1000 * 1000; + u32_t div, rem, frac; + + div = clk / (16 * 115200); + rem = clk % (16 * 115200); + frac = (8 * rem / 115200) >> 1; + frac += (8 * rem / 115200) & 1; + + write32(virt + 0x24, div); + write32(virt + 0x28, frac); + write32(virt + 0x2c, (0x3 << 5) | (0x0 << 3) | (0x0 << 1) | (0x1 << 4)); + write32(virt + 0x30, (1 << 0) | (1 << 8) | (1 << 9)); + } + + for(i = 0; i < count; i++) + { + while((read8(virt + 0x18) & (0x1 << 5))); + write8(virt + 0x00, buf[i]); + } +} + +static const char * mach_uniqueid(struct machine_t * mach) +{ + return NULL; +} + +static int mach_keygen(struct machine_t * mach, const char * msg, void * key) +{ + return 0; +} + +static struct machine_t versatile_arm926 = { + .name = "versatile-arm926", + .desc = "ARM Versatile Platform Baseboard Explore for ARM926EJ-S", + .detect = mach_detect, + .smpinit = mach_smpinit, + .smpboot = mach_smpboot, + .shutdown = mach_shutdown, + .reboot = mach_reboot, + .sleep = mach_sleep, + .cleanup = mach_cleanup, + .logger = mach_logger, + .uniqueid = mach_uniqueid, + .keygen = mach_keygen, +}; + +static __init void versatile_arm926_machine_init(void) +{ + register_machine(&versatile_arm926); +} + +static __exit void versatile_arm926_machine_exit(void) +{ + unregister_machine(&versatile_arm926); +} + +machine_initcall(versatile_arm926_machine_init); +machine_exitcall(versatile_arm926_machine_exit); diff --git a/src/arch/arm32/mach-versatile/xboot.ld b/src/arch/arm32/mach-versatile/xboot.ld new file mode 100755 index 0000000000000000000000000000000000000000..b8c0d5890aef51503c7d9529f97d9b9344040ceb --- /dev/null +++ b/src/arch/arm32/mach-versatile/xboot.ld @@ -0,0 +1,176 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) + +STACK_UND_SIZE = 0x40000 * 4; +STACK_ABT_SIZE = 0x40000 * 4; +STACK_IRQ_SIZE = 0x40000 * 4; +STACK_FIQ_SIZE = 0x40000 * 4; +STACK_SRV_SIZE = 0x100000 * 4; + +MEMORY +{ + rom : org = 0x00000000, len = 32M + ram : org = 0x02000000, len = 32M + dma : org = 0x04000000, len = 32M + heap : org = 0x06000000, len = 32M +} + +SECTIONS +{ + .text : + { + PROVIDE(__image_start = .); + PROVIDE(__text_start = .); + .obj/arch/arm32/mach-versatile/start.o (.text*) + *(.text*) + *(.init.text) + *(.exit.text) + *(.glue*) + *(.note.gnu.build-id) + PROVIDE(__text_end = .); + } > rom + + .ARM.exidx ALIGN(8) : + { + PROVIDE (__exidx_start = .); + *(.ARM.exidx*) + PROVIDE (__exidx_end = .); + } > rom + + .ARM.extab ALIGN(8) : + { + PROVIDE (__extab_start = .); + *(.ARM.extab*) + PROVIDE (__extab_end = .); + } > rom + + .initcall ALIGN(8) : + { + PROVIDE(__initcall_start = .); + KEEP(*(.initcall_0.text)) + KEEP(*(.initcall_1.text)) + KEEP(*(.initcall_2.text)) + KEEP(*(.initcall_3.text)) + KEEP(*(.initcall_4.text)) + KEEP(*(.initcall_5.text)) + KEEP(*(.initcall_6.text)) + KEEP(*(.initcall_7.text)) + KEEP(*(.initcall_8.text)) + KEEP(*(.initcall_9.text)) + PROVIDE(__initcall_end = .); + } > rom + + .exitcall ALIGN(8) : + { + PROVIDE(__exitcall_start = .); + KEEP(*(.exitcall_9.text)) + KEEP(*(.exitcall_8.text)) + KEEP(*(.exitcall_7.text)) + KEEP(*(.exitcall_6.text)) + KEEP(*(.exitcall_5.text)) + KEEP(*(.exitcall_4.text)) + KEEP(*(.exitcall_3.text)) + KEEP(*(.exitcall_2.text)) + KEEP(*(.exitcall_1.text)) + KEEP(*(.exitcall_0.text)) + PROVIDE(__exitcall_end = .); + } > rom + + .ksymtab ALIGN(16) : + { + PROVIDE(__ksymtab_start = .); + KEEP(*(.ksymtab.text)) + PROVIDE(__ksymtab_end = .); + } > rom + + .romdisk ALIGN(8) : + { + PROVIDE(__romdisk_start = .); + KEEP(*(.romdisk)) + PROVIDE(__romdisk_end = .); + } > rom + + .rodata ALIGN(8) : + { + PROVIDE(__rodata_start = .); + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + PROVIDE(__rodata_end = .); + } > rom + + .data_shadow ALIGN(8) : + { + PROVIDE(__data_shadow_start = .); + PROVIDE(__data_shadow_end = (. + SIZEOF(.data))); + PROVIDE(__image_end = __data_shadow_end); + } > rom + + .data : AT(ADDR(.data_shadow)) + { + PROVIDE(__data_start = .); + *(.data*) + . = ALIGN(8); + PROVIDE(__data_end = .); + } > ram + + .bss ALIGN(8) (NOLOAD) : + { + PROVIDE(__bss_start = .); + *(.bss*) + *(.sbss*) + *(COMMON) + . = ALIGN(8); + PROVIDE(__bss_end = .); + } > ram + + .stack ALIGN(8) (NOLOAD) : + { + PROVIDE(__stack_start = .); + PROVIDE(__stack_und_start = .); + . += STACK_UND_SIZE; + PROVIDE(__stack_und_end = .); + . = ALIGN(8); + PROVIDE(__stack_abt_start = .); + . += STACK_ABT_SIZE; + PROVIDE(__stack_abt_end = .); + . = ALIGN(8); + PROVIDE(__stack_irq_start = .); + . += STACK_IRQ_SIZE; + PROVIDE(__stack_irq_end = .); + . = ALIGN(8); + PROVIDE(__stack_fiq_start = .); + . += STACK_FIQ_SIZE; + PROVIDE(__stack_fiq_end = .); + . = ALIGN(8); + PROVIDE(__stack_srv_start = .); + . += STACK_SRV_SIZE; + PROVIDE(__stack_srv_end = .); + . = ALIGN(8); + PROVIDE(__stack_end = .); + } > ram + + .dma ALIGN(8) (NOLOAD) : + { + PROVIDE(__dma_start = ORIGIN(dma)); + PROVIDE(__dma_end = ORIGIN(dma) + LENGTH(dma)); + } > dma + + .heap ALIGN(8) (NOLOAD) : + { + PROVIDE(__heap_start = ORIGIN(heap)); + PROVIDE(__heap_end = ORIGIN(heap) + LENGTH(heap)); + } > heap + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/src/arch/arm32/mach-versatile/xboot.mk b/src/arch/arm32/mach-versatile/xboot.mk new file mode 100755 index 0000000000000000000000000000000000000000..39f0f39a47c696b74ec4e0c2cd83844a536fb219 --- /dev/null +++ b/src/arch/arm32/mach-versatile/xboot.mk @@ -0,0 +1,16 @@ +# +# Machine makefile +# + +DEFINES += -D__ARM32_ARCH__=5 -D__ARM926EJS__ + +ASFLAGS := -g -ggdb -Wall -O3 +CFLAGS := -g -ggdb -Wall -O3 +LDFLAGS := -T arch/$(ARCH)/$(MACH)/xboot.ld -nostdlib +MCFLAGS := -march=armv5te -mtune=arm926ej-s -mfloat-abi=soft -marm -mno-thumb-interwork -mno-unaligned-access + +LIBDIRS := +LIBS := +INCDIRS := +SRCDIRS := + diff --git a/tools/qemu-system/linux/versatile-run.sh b/tools/qemu-system/linux/versatile-run.sh new file mode 100755 index 0000000000000000000000000000000000000000..44f5028dc0d6803c2f4db052853815d817ab298a --- /dev/null +++ b/tools/qemu-system/linux/versatile-run.sh @@ -0,0 +1,13 @@ +#!/bin/sh +# + +# The qemu's root directory. +export QEMU_DIR=$(cd `dirname $0` ; pwd) + +if [ ! -e ~/.xboot/sdcard.img ]; then + mkdir -p ~/.xboot; + unzip ${QEMU_DIR}/sdcard.zip -d ~/.xboot > /dev/null; +fi + +# Run qemu +exec qemu-system-arm -M versatileab -m 128M -name "ARM Versatile Platform Baseboard Explore for ARM926" -show-cursor -rtc base=localtime -serial stdio -sd ~/.xboot/sdcard.img -kernel ${QEMU_DIR}/../../../output/xboot