From 2a2b5f93c2ee2071eb32c65f925974d02c11808d Mon Sep 17 00:00:00 2001
From: Paolo Bonzini <pbonzini@redhat.com>
Date: Mon, 27 Feb 2023 10:57:09 +0100
Subject: [PATCH] target/i386: add FSRM to TCG

mainline inclusion
from mainline-v8.0.0-rc0
commit c0728d4e3d23356691e4182eac54c67e1ca26618
category: feature
feature: Intel fast REP string operations support
bugzilla: https://gitee.com/openeuler/intel-qemu/issues/I6ZGIX

Intel-SIG: commit c0728d4e3d23 ("target/i386: add FSRM to TCG")

-------------------------------------

target/i386: add FSRM to TCG

Fast short REP MOVS can be added to TCG, since a trivial translation
of string operation is a good option for short lengths.

Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aichun Shi <aichun.shi@intel.com>
---
 target/i386/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 61cd7abcaa..13dcd4c720 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -660,7 +660,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
 #define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_PKU | \
           /* CPUID_7_0_ECX_OSPKE is dynamic */ \
           CPUID_7_0_ECX_LA57 | CPUID_7_0_ECX_PKS)
-#define TCG_7_0_EDX_FEATURES 0
+#define TCG_7_0_EDX_FEATURES CPUID_7_0_EDX_FSRM
 #define TCG_7_1_EAX_FEATURES (CPUID_7_1_EAX_FZRM | CPUID_7_1_EAX_FSRS | \
           CPUID_7_1_EAX_FSRC)
 #define TCG_APM_FEATURES 0
-- 
2.27.0